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Search results for vhdl

1,026 search results found

Logisim Evolution ⭐ 4,251

Digital logic design tool and simulator

Digital ⭐ 3,476

A digital logic designer and circuit simulator.

VHDL 2008/93/87 simulator

Vexriscv ⭐ 2,135

A FPGA friendly 32 bit RISC-V CPU implementation

Cocotb ⭐ 1,612

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

Spinalhdl ⭐ 1,451

Scala based HDL

Aws Fpga ⭐ 1,366

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

Neorv32 ⭐ 1,337

🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Clash Compiler ⭐ 1,336

Haskell to VHDL/Verilog/SystemVerilog compiler

Fusesoc ⭐ 1,065

Package manager and build abstraction tool for FPGA/ASIC development

Open Source Fpga Bitcoin Miner ⭐ 902

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.

Awesome Hdl ⭐ 830

Hardware Description Languages

Fpga_webserver ⭐ 740

A work-in-progress for what is to be a software-free web server for static content.

VUnit is a unit testing framework for VHDL/SystemVerilog

Microwatt ⭐ 634

A tiny Open POWER ISA softcore written in VHDL 2008

Gcvideo ⭐ 585

GameCube Digital AV converter

Edalize ⭐ 573

An abstraction library for interfacing EDA tools

Openwifi Hw ⭐ 560

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

VHDL compiler and simulator

Riscv_vhdl ⭐ 552

Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators

Thunderscope ⭐ 548

ThunderScope GitHub Repo

Pipelinec ⭐ 519

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

HAL – The Hardware Analyzer

Vscode Teroshdl ⭐ 457

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

Parallella Hw ⭐ 377

Parallella board design files

Parallella Examples ⭐ 375

Community created parallella projects

Awesome Open Hardware Verification ⭐ 353

A List of Free and Open Source Hardware Verification Tools and Frameworks

Openfpga Snes ⭐ 339

SNES for the Analogue Pocket

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

Mister64 ⭐ 305

UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/

Rust_hdl ⭐ 297

Hastlayer Sdk ⭐ 281

Turning .NET software into FPGA hardware for faster execution and lower power usage.

Forth Cpu ⭐ 276

A Forth CPU and System on a Chip, based on the J1, written in VHDL

Ghdl Yosys Plugin ⭐ 270

VHDL synthesis (based on ghdl)

Dsi Shield ⭐ 268

Arduino MIPI DSI Shield

Code generation tool for configuration and status registers

A huge VHDL library for FPGA development

Hdlconvertor ⭐ 258

Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4

Bladerf Wiphy ⭐ 255

bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

Satcat5 ⭐ 240

SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.

C64 Video Enhancement ⭐ 239

Component video modification for the C64 8-bit computer

Introtospartanfpgabook ⭐ 239

A book on using the Spartan 3E FPGA with VHDL, using the Papilio One or Digilent Basys2 boards

Mega65 Core ⭐ 232

MEGA65 FPGA core

A simple RISC-V processor for use in FPGA designs.

Opl3_fpga ⭐ 225

Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer

Ip Cores ⭐ 214

A huge collection of VHDL/Verilog open-source IP cores scraped from the web

Gb Research ⭐ 213

Game Boy hardware research

A modern and open-source cross-platform software for chips reverse engineering.

Free Range Vhdl Book ⭐ 209

Latex source files of the open-source book FREE RANGE VHDL

OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...

Vhdl_lib ⭐ 199

Library of VHDL components that are useful in larger designs.

Zynq7010 7020_ad9363 ⭐ 198

基于ZYNQ+AD9363的开源SDR硬件

Openxenium ⭐ 198

OpenXenium - Open Source Xenium Modchip CPLD replacement project for the Original Xbox

A hardware compiler based on LLHD and CIRCT

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

Psx_mister ⭐ 176

Two RX-channel 6 GHz FMCW radar design files

Snes_mister ⭐ 173

SNES for MiSTer

Ztachip ⭐ 172

Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.

Playstation_mister ⭐ 171

PlayStation for MiSTer FPGA

Xjtu Tripler ⭐ 170

XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.

Fpga_displayport ⭐ 168

An implementation of DisplayPort protocol for FPGAs

Axiom Firmware ⭐ 160

AXIOM firmware (linux image, gateware and software tools)

Vhdl Style Guide ⭐ 159

Style guide enforcement for VHDL

Vhdl Extras ⭐ 156

Flexible VHDL library

An open-source GBA consolizer.

Open source software for chip reverse engineering.

Fomu Workshop ⭐ 148

Support files for participating in a Fomu workshop

Learn Fpga Programming ⭐ 146

Learn FPGA Programming, published by Packt

Space Invaders Vhdl ⭐ 138

Space Invaders game implemented with VHDL

Hdl_checker ⭐ 136

Repurposing existing HDL tools to help writing better code

Ethernet_mac ⭐ 135

Tri-mode (10/100/1000) full-duplex FPGA ethernet MAC in VHDL

Gba_mister ⭐ 131

Hardh264 ⭐ 129

A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.

Fpga_accelerator_yolov3tiny ⭐ 126

Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project

Image Processing ⭐ 123

Image Processing Toolbox in Verilog using Basys3 FPGA

Second version of homemade 30 MHz - 6 GHz VNA

Awesome ⭐ 115

A curated list of awesome resources for HDL design and verification

Chiselverify ⭐ 114

A dynamic verification library for Chisel.

Emulate Integrated Circuits at the logic level

Neotrng ⭐ 113

🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).

Sonicsurface ⭐ 112

Generating Airborne Ultrasonic Amplitude Patterns Using an Open Hardware Phased Array

Tinytpu ⭐ 111

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

PDP-11/70 CPU core and SoC

Homebrewgpu ⭐ 106

HomebrewGPU is a simple ray tracing GPU on FPGA which implements basic ray-primitive intersection, BVH traversal, shadowing, reflection and refraction. This is a project I used to learn programming in Verilog and I think it should be educational to someone who is new to FPGA.

Neppielight ⭐ 104

FPGA-based HDMI ambient lighting

Hdmi2usb Jahanzeb Firmware ⭐ 99

Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project

Artix 7 Hdmi Processing ⭐ 98

Receiving and processing 1080p HDMI audio and video on the Artix 7 FPGA

All the files for ZX-Uno project repository

AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

A VHDL frontend for Yosys

A Bitcoin miner for the Zynq chip utilizing the Zedboard.

Regression test suite for Icarus Verilog. (OBSOLETE)

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