Hardh264
A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Hardh264 | 129 | 6 years ago | 5 | other | VHDL | |||||
| A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx. | ||||||||||
| Jpeg_open | 9 | 4 years ago | mit | VHDL | ||||||
| A hardware MJPEG encoder and RTP transmitter | ||||||||||
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