Logisim Evolution
Digital logic design tool and simulator
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Logisim Evolution | 4,251 | a month ago | 209 | gpl-3.0 | Java | |||||
| Digital logic design tool and simulator | ||||||||||
| Digital | 3,476 | 4 months ago | 87 | gpl-3.0 | Java | |||||
| A digital logic designer and circuit simulator. | ||||||||||
| Issie | 56 | 4 months ago | 30 | gpl-3.0 | F# | |||||
| Issie - an intuitive cross-platform hardware design application. https://tomcl.github.io/issie | ||||||||||
| Tinycpu | 21 | 12 years ago | Verilog | |||||||
| Tiny CPU is a small 32-bit CPU done mostly as a hobby for educational purposes. | ||||||||||
| Tsinghua Ee Miscellanea | 8 | 5 years ago | MATLAB | |||||||
| :feet: Miscellanious projects during 2014-2018 in Dept. of Electronic Engineering, Tsinghua University | ||||||||||
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