The Top 1,526 Fpga Open Source Projects on Github

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The Top 1,526 Fpga Open Source Projects on Github

Categories > Hardware > Fpga

Paddle Lite ⭐ 5,865

Multi-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎）

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

Platformio Core ⭐ 5,610

PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!

Openwifi ⭐ 2,276

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

Logisim Evolution ⭐ 1,989

Digital logic design tool and simulator

Glasgow ⭐ 1,499

Scots Army Knife for electronics

Vexriscv ⭐ 1,400

A FPGA friendly 32 bit RISC-V CPU implementation

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

Darkriscv ⭐ 1,298

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Nyuziprocessor ⭐ 1,145

GPGPU microprocessor architecture

Icestudio ⭐ 1,104

❄️ Visual editor for open FPGA boards

Clash Compiler ⭐ 1,068

Haskell to VHDL/Verilog/SystemVerilog compiler

Spinalhdl ⭐ 912

Scala based HDL

HDL libraries and projects

Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.

Fusesoc ⭐ 787

Package manager and build abstraction tool for FPGA/ASIC development

Pipecnn ⭐ 779

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

Platformio Vscode Ide ⭐ 776

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

Amaranth ⭐ 767

A modern hardware definition language and toolchain based on Python

A small, light weight, RISC CPU soft core

Cariboulite ⭐ 757

CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR

Neorv32 ⭐ 684

🖥 An area-optimized, customizable MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

The USRP™ Hardware Driver Repository

SERV - The SErial RISC-V CPU

Vtr Verilog To Routing ⭐ 598

Verilog to Routing -- Open Source CAD Flow for FPGA Research

Machine learning on FPGAs using HLS

Dsp Theory ⭐ 591

Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.

a USB multitool + Amaranth HDL framework for monitoring, hacking, and developing USB devices

A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen

Send video/audio over HDMI on an FPGA

Tornadovm ⭐ 568

TornadoVM: A practical and efficient heterogeneous programming framework for managed languages

Brevitas ⭐ 558

Brevitas: quantization-aware training in PyTorch

Prjxray ⭐ 539

Documenting the Xilinx 7-series bit-stream format.

Riscv Cores List ⭐ 529

RISC-V Cores, SoC platforms and SoCs

Firesim ⭐ 511

FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud

VUnit is a unit testing framework for VHDL/SystemVerilog

Embedded Neural Network ⭐ 506

collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

Vitis Tutorials ⭐ 484

Cores Swerv ⭐ 477

Platformio Atom Ide ⭐ 474

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

🌱 Open source ecosystem for open FPGA boards

Openfpgaloader ⭐ 458

Universal utility for programming FPGA

Cascade ⭐ 416

A Just-In-Time Compiler for Verilog from VMware Research

Basic_verilog ⭐ 414

Must-have verilog systemverilog modules

Pp4fpgas Cn ⭐ 394

中文版 Parallel Programming for FPGAs

Fpga Network Stack ⭐ 391

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

Trisycl ⭐ 389

Generic system-wide modern C++ for heterogeneous platforms with SYCL from Khronos Group

A lightweight high performance tensor algebra framework for modern C++

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

Edalize ⭐ 375

An abstraction library for interfacing EDA tools

HAL – The Hardware Analyzer

RISC-V CPU Core (RV32IM)

Dataflow compiler for QNN inference on FPGAs

Nontrivial Mips ⭐ 362

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

S6_pcie_microblaze ⭐ 358

PCI Express DIY hacking toolkit for Xilinx SP605

Open Fpga Verilog Tutorial ⭐ 355

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

QKeras: a quantization deep learning library for Tensorflow Keras

Openpiton ⭐ 345

The OpenPiton Platform

Beagle_sdr_gps ⭐ 343

KiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS

Openfpga ⭐ 334

An Open-source FPGA IP Generator

Xilinx Run Time for FPGA

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

Various HDL (Verilog) IP Cores

A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

Sdaccel_examples ⭐ 302

SDAccel Examples

Openwifi Hw ⭐ 301

FPGA (chip) design of openwifi (IEEE 802.11)

Biriscv ⭐ 300

32-bit Superscalar RISC-V CPU

Reduceron ⭐ 296

FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.

E203_hbirdv2 ⭐ 289

The Ultra-Low Power RISC-V Core

Fpga Imaging Library ⭐ 271

An open source library for image processing on FPGA.

🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board

Forth Cpu ⭐ 263

A Forth CPU and System on a Chip, based on the J1, written in VHDL

Wb2axip ⭐ 253

Bus bridges and other odds and ends

Blueoil ⭐ 243

Bring Deep Learning to small devices

Verilog ⭐ 243

Repository for basic (and not so basic) Verilog blocks with high re-use potential

Hastlayer Sdk ⭐ 236

Turning .NET assemblies into FPGA hardware for faster execution and lower power usage. See the Readme and https://hastlayer.com.

Projf Explore ⭐ 233

Project F brings FPGAs to life with exciting open-source designs you can build on.

Echomods ⭐ 228

Open source ultrasound processing modules and building blocks

Red Pitaya Notes ⭐ 227

Notes on the Red Pitaya Open Source Instrument

80186 compatible SystemVerilog CPU core and FPGA reference design

Pipelinec ⭐ 213

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

Vscode Teroshdl ⭐ 212

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

Verilog Generator Of Neural Net Digit Detector For Fpga ⭐ 206

Verilog Generator of Neural Net Digit Detector for FPGA

DaCe - Data Centric Parallel Programming

Heterocl ⭐ 202

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing

32-bit RISC-V system on chip for iCE40 and ECP5 FPGAs

Xilinx_axidma ⭐ 194

A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.

Convolution_network_on_fpga ⭐ 187

CNN acceleration on virtex-7 FPGA with verilog HDL

Rapidwright ⭐ 185

Build Customized FPGA Implementations for Vivado

A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

Fpga_readings ⭐ 178

Recipe for FPGA cooking

💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

Awesome Latticefpgas ⭐ 174

📖 List of FPGA Lattice boards using open tools

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

Vivado Risc V ⭐ 169

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

Plutosdr Fw ⭐ 169

PlutoSDR Firmware

Symbiflow Arch Defs ⭐ 167

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

Fpga Chip8 ⭐ 167

CHIP-8 console on FPGA

Symbiflow Examples ⭐ 166

Example designs showing different ways to use SymbiFlow toolchains.

1-100 of 1,526 projects

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Advertising 📦 9

Application Programming Interfaces 📦 120

Applications 📦 181

Artificial Intelligence 📦 72

Blockchain 📦 70

Build Tools 📦 111

Cloud Computing 📦 79

Code Quality 📦 28

Collaboration 📦 30

Command Line Interface 📦 48

Community 📦 81

Companies 📦 60

Compilers 📦 60

Computer Science 📦 74

Configuration Management 📦 39

Content Management 📦 167

Control Flow 📦 197

Data Formats 📦 77

Data Processing 📦 266

Data Storage 📦 132

Economics 📦 60

Frameworks 📦 198

Graphics 📦 103

Hardware 📦 148

Integrated Development Environments 📦 47

Learning Resources 📦 147

Libraries 📦 119

Lists Of Projects 📦 21

Machine Learning 📦 336

Mapping 📦 61

Marketing 📦 15

Mathematics 📦 55

Messaging 📦 97

Networking 📦 304

Operating Systems 📦 84

Operations 📦 120

Package Managers 📦 52

Programming Languages 📦 229

Runtime Environments 📦 96

Science 📦 42

Security 📦 375

Social Media 📦 26

Software Architecture 📦 70

Software Development 📦 68

Software Performance 📦 57

Software Quality 📦 127

Text Editors 📦 45

Text Processing 📦 131

User Interface 📦 310

User Interface Components 📦 465

Version Control 📦 29

Virtualization 📦 68

Web Browsers 📦 38

Web Servers 📦 25

Web User Interface 📦 194

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