The Top 151 Fpga Open Source Projects

Awesome Open Source

Awesome Open Source

Combined Topics

Advertising 📦 10

Application Programming Interfaces 📦 124

Applications 📦 192

Artificial Intelligence 📦 78

Blockchain 📦 73

Build Tools 📦 113

Cloud Computing 📦 80

Code Quality 📦 28

Collaboration 📦 32

Command Line Interface 📦 49

Community 📦 83

Companies 📦 60

Compilers 📦 63

Computer Science 📦 80

Configuration Management 📦 42

Content Management 📦 175

Control Flow 📦 213

Data Formats 📦 78

Data Processing 📦 276

Data Storage 📦 135

Economics 📦 64

Frameworks 📦 215

Graphics 📦 110

Hardware 📦 152

Integrated Development Environments 📦 49

Learning Resources 📦 166

Libraries 📦 129

Lists Of Projects 📦 22

Machine Learning 📦 347

Mapping 📦 64

Marketing 📦 15

Mathematics 📦 55

Messaging 📦 98

Networking 📦 315

Operating Systems 📦 89

Operations 📦 121

Package Managers 📦 55

Programming Languages 📦 245

Runtime Environments 📦 100

Science 📦 42

Security 📦 396

Social Media 📦 27

Software Architecture 📦 72

Software Development 📦 72

Software Performance 📦 58

Software Quality 📦 133

Text Editors 📦 49

Text Processing 📦 136

User Interface 📦 330

User Interface Components 📦 514

Version Control 📦 30

Virtualization 📦 71

Web Browsers 📦 42

Web Servers 📦 26

Web User Interface 📦 210

The Top 151 Fpga Open Source Projects

Categories > Hardware > Fpga

Paddle Lite ⭐ 5,480

Multi-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎）

Platformio Core ⭐ 4,992

PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

Openwifi ⭐ 1,734

open-source IEEE802.11/Wi-Fi baseband chip/FPGA design

Glasgow ⭐ 1,388

Scots Army Knife for electronics

Nyuziprocessor ⭐ 1,364

GPGPU microprocessor architecture

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

Darkriscv ⭐ 1,080

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Vexriscv ⭐ 1,066

A FPGA friendly 32 bit RISC-V CPU implementation

Icestudio ⭐ 968

❄️ Visual editor for open FPGA boards

Clash Compiler ⭐ 967

Haskell to VHDL/Verilog/SystemVerilog compiler

Pipecnn ⭐ 791

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

HDL libraries and projects

Spinalhdl ⭐ 715

Scala based HDL

Platformio Vscode Ide ⭐ 688

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

A small, light weight, RISC CPU soft core

Fusesoc ⭐ 623

Package manager and build abstraction tool for FPGA/ASIC development

The USRP™ Hardware Driver Repository

Send video/audio over HDMI on an FPGA

A refreshed Python toolbox for building complex digital hardware

Embedded Neural Network ⭐ 496

collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning

Prjxray ⭐ 494

Documenting the Xilinx 7-series bit-stream format.

Tornadovm ⭐ 491

TornadoVM: A practical and efficient heterogeneous programming framework for managed languages

Machine learning in FPGAs using HLS

Riscv Cores List ⭐ 477

RISC-V Cores, SoC platforms and SoCs

Vtr Verilog To Routing ⭐ 476

Verilog to Routing -- Open Source CAD Flow for FPGA Research

Platformio Atom Ide ⭐ 475

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

Open Fpga Verilog Tutorial ⭐ 467

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.

Dsp Theory ⭐ 450

Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.

VUnit is a unit testing framework for VHDL/SystemVerilog

Nontrivial Mips ⭐ 423

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

Firesim ⭐ 419

FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud

Cores Swerv ⭐ 418

Cascade ⭐ 413

A Just-In-Time Compiler for Verilog from VMware Research

A refreshed Python toolbox for building complex digital hardware

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

🌱 Open source ecosystem for open FPGA boards

Trisycl ⭐ 354

Generic system-wide modern C++ for heterogeneous platforms with SYCL from Khronos Group

Brevitas ⭐ 353

Brevitas: quantization-aware training in PyTorch

Fpga Network Stack ⭐ 349

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

Pp4fpgas Cn ⭐ 346

中文版 Parallel Programming for FPGAs

A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

Fpga Imaging Library ⭐ 330

An open source library for image processing on FPGA.

Sdaccel_examples ⭐ 325

SDAccel Examples

S6_pcie_microblaze ⭐ 315

PCI Express DIY hacking toolkit for Xilinx SP605

Accelerating Cnn With Fpga ⭐ 313

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

Reduceron ⭐ 311

FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.

Beagle_sdr_gps ⭐ 302

KiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS

HAL – The Hardware Analyzer

Verilog ⭐ 297

Repository for basic (and not so basic) Verilog blocks with high re-use potential

Dataflow compiler for QNN inference on FPGAs

A lightweight high performance tensor algebra framework for modern C++

Openpiton ⭐ 288

The OpenPiton Platform

RISC-V CPU Core (RV32IM)

🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board

Edalize ⭐ 281

An abstraction library for interfacing EDA tools

Various HDL (Verilog) IP Cores

Openfpgaloader ⭐ 271

Universal utility for programming FPGA

QKeras: a quantization deep learning library for Tensorflow Keras

Xilinx_axidma ⭐ 255

A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.

Basic_verilog ⭐ 251

Must-have verilog systemverilog modules

Forth Cpu ⭐ 245

A Forth CPU and System on a Chip, based on the J1, written in VHDL

Blueoil ⭐ 244

Bring Deep Learning to small devices

Convolution_network_on_fpga ⭐ 241

CNN acceleration on virtex-7 FPGA with verilog HDL

Xilinx Run Time for FPGA

32-bit RISC-V system on chip for iCE40 and ECP5 FPGAs

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

Hastlayer Sdk ⭐ 227

Turning .NET assemblies into FPGA hardware for faster execution and lower power usage. See the Readme and https://hastlayer.com.

80186 compatible SystemVerilog CPU core and FPGA reference design

Biriscv ⭐ 211

32-bit Superscalar RISC-V CPU

Openfpga ⭐ 208

An Open-source FPGA IP Generator

Red Pitaya Notes ⭐ 206

Notes on the Red Pitaya Open Source Instrument

Echomods ⭐ 201

Open source ultrasound processing modules and building blocks

FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)

Openwifi Hw ⭐ 189

FPGA/hardware design of openwifi

Verilog Generator Of Neural Net Digit Detector For Fpga ⭐ 187

Verilog Generator of Neural Net Digit Detector for FPGA

Wb2axip ⭐ 182

Bus bridges and other odds and ends

Fpga Chip8 ⭐ 169

CHIP-8 console on FPGA

Heterocl ⭐ 164

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing

Fpga_readings ⭐ 164

Recipe for FPGA cooking

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

Mipi_csi_receiver_fpga ⭐ 159

MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3

Tinytpu ⭐ 158

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

A very small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

Plutosdr Fw ⭐ 153

PlutoSDR Firmware

Rapidwright ⭐ 152

Build Customized FPGA Implementations for Vivado

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

Fletcher ⭐ 145

Fletcher: A framework to integrate FPGA accelerators with Apache Arrow

Neorv32 ⭐ 144

A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.

Space Invaders Vhdl ⭐ 142

Space Invaders game implemented with VHDL

Openfpgaduino ⭐ 138

All open source file and project for OpenFPGAduino project

Symbiflow Arch Defs ⭐ 138

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

A collection of extensions for Vivado HLS and Intel FPGA OpenCL to improve developer quality of life.

Gemm_hls ⭐ 137

Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.

Tang_e203_mini ⭐ 135

LicheeTang 蜂鸟E203 Core

Wbuart32 ⭐ 134

A simple, basic, formally verified UART controller

Pipelinec ⭐ 134

A C-like hardware description language (HDL) adding HLS(high level synthesis)-like automatic pipelining as a language construct/compiler feature.

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

Free Tpu ⭐ 133

Free TPU for FPGA with Lenet, MobileNet, Squeezenet, Resnet, Inception V3, YOLO V3, and ICNet. Deep learning acceleration using Xilinx zynq (Zedboard or ZC702 ) or kintex-7 to solve image classification, detection, and segmentation problem.

1-100 of 151 projects

Advertising 📦 10

Application Programming Interfaces 📦 124

Applications 📦 192

Artificial Intelligence 📦 78

Blockchain 📦 73

Build Tools 📦 113

Cloud Computing 📦 80

Code Quality 📦 28

Collaboration 📦 32

Command Line Interface 📦 49

Community 📦 83

Companies 📦 60

Compilers 📦 63

Computer Science 📦 80

Configuration Management 📦 42

Content Management 📦 175

Control Flow 📦 213

Data Formats 📦 78

Data Processing 📦 276

Data Storage 📦 135

Economics 📦 64

Frameworks 📦 215

Graphics 📦 110

Hardware 📦 152

Integrated Development Environments 📦 49

Learning Resources 📦 166

Libraries 📦 129

Lists Of Projects 📦 22

Machine Learning 📦 347

Mapping 📦 64

Marketing 📦 15

Mathematics 📦 55

Messaging 📦 98

Networking 📦 315

Operating Systems 📦 89

Operations 📦 121

Package Managers 📦 55

Programming Languages 📦 245

Runtime Environments 📦 100

Science 📦 42

Security 📦 396

Social Media 📦 27

Software Architecture 📦 72

Software Development 📦 72

Software Performance 📦 58

Software Quality 📦 133

Text Editors 📦 49

Text Processing 📦 136

User Interface 📦 330

User Interface Components 📦 514

Version Control 📦 30

Virtualization 📦 71

Web Browsers 📦 42

Web Servers 📦 26

Web User Interface 📦 210