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The Top 234 Verilog Open Source Projects
Categories
>
Hardware
>
Verilog
Platformio Core
⭐
4,681
PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!
Chisel3
⭐
1,625
Chisel 3: A Modern Hardware Design Language
Openwifi
⭐
1,583
open-source IEEE802.11/Wi-Fi baseband chip/FPGA design
E200_opensource
⭐
1,576
The Ultra-Low Power RISC Core
Picorv32
⭐
1,508
PicoRV32 - A Size-Optimized RISC-V CPU
Wujian100_open
⭐
1,227
IC design and development should be faster,simpler and more reliable
Nyuziprocessor
⭐
1,149
GPGPU microprocessor architecture
Hw
⭐
1,004
RTL, Cmodel, and testbench for NVDLA
Darkriscv
⭐
991
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
Vexriscv
⭐
985
A FPGA friendly 32 bit RISC-V CPU implementation
Amiga2000 Gfxcard
⭐
933
MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog
Clash Compiler
⭐
930
Haskell to VHDL/Verilog/SystemVerilog compiler
Icestudio
⭐
922
❄️ Visual editor for open FPGA boards
Hdl
⭐
693
HDL libraries and projects
Cocotb
⭐
677
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
Spinalhdl
⭐
649
Scala based HDL
Verilog Ethernet
⭐
648
Verilog Ethernet components for FPGA implementation
Platformio Vscode Ide
⭐
645
PlatformIO IDE for VSCode: The next generation integrated development environment for IoT
Miaow
⭐
639
An open source GPU based off of the AMD Southern Islands ISA.
Zipcpu
⭐
620
A small, light weight, RISC CPU soft core
Oh
⭐
573
Verilog library for ASIC and FPGA designers
Verilator
⭐
563
Verilator open-source SystemVerilog simulator and lint system
Corundum
⭐
552
Open source, high performance, FPGA-based NIC
Uhd
⭐
522
The USRP™ Hardware Driver Repository
Platformio Atom Ide
⭐
477
PlatformIO IDE for Atom: The next generation integrated development environment for IoT
Odrivehardware
⭐
464
High performance motor control
Vtr Verilog To Routing
⭐
447
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Open Fpga Verilog Tutorial
⭐
442
Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
Sd2snes
⭐
405
SD card based multi-purpose cartridge for the SNES
Mips Cpu
⭐
404
MIPS CPU implemented in Verilog
Cascade
⭐
400
A Just-In-Time Compiler for Verilog from VMware Research
Leflow
⭐
393
Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
Scr1
⭐
382
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
Microwatt
⭐
361
A tiny Open POWER ISA softcore written in VHDL 2008
Apio
⭐
348
🌱 Open source ecosystem for open FPGA boards
Awesome Hdl
⭐
339
Hardware Description Languages
Verilog Axi
⭐
329
Verilog AXI components for FPGA implementation
Mor1kx
⭐
323
mor1kx - an OpenRISC 1000 processor IP core
Riffa
⭐
310
The RIFFA development repository
Serv
⭐
310
SERV - The SErial RISC-V CPU
Riscv Formal
⭐
308
RISC-V Formal Verification Framework
Fpga Imaging Library
⭐
306
An open source library for image processing on FPGA.
Reduceron
⭐
297
FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.
Beagle_sdr_gps
⭐
291
KiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS
Verilog
⭐
278
Repository for basic (and not so basic) Verilog blocks with high re-use potential
Icezum
⭐
277
🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board
Ucr Eecs168 Lab
⭐
276
The lab schedules for EECS168 at UC Riverside
Netfpga
⭐
275
NetFPGA 1G infrastructure and gateware
Verilogboy
⭐
271
A Pi emulating a GameBoy sounds cheap. What about an FPGA?
Prjtrellis
⭐
266
Documenting the Lattice ECP5 bit-stream format.
Openpiton
⭐
263
The OpenPiton Platform
Cores
⭐
249
Various HDL (Verilog) IP Cores
Edalize
⭐
246
An abstraction library for interfacing EDA tools
Project Zipline
⭐
245
Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
Openroad
⭐
245
OpenROAD's unified application implementing an RTL-to-GDS Flow
Riscv
⭐
244
RISC-V CPU Core (RV32IM)
Openlane
⭐
240
OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
Fpga Litecoin Miner
⭐
239
A litecoin scrypt miner implemented with FPGA on-chip memory.
Basic_verilog
⭐
232
Must-have verilog systemverilog modules
Convolution_network_on_fpga
⭐
226
CNN acceleration on virtex-7 FPGA with verilog HDL
Verilog Pcie
⭐
224
Verilog PCI express components
Zet
⭐
216
Open source implementation of a x86 processor
Spispy
⭐
214
An open source SPI flash emulator and monitor
Flute
⭐
205
RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
Fpu
⭐
202
synthesiseable ieee 754 floating point library in verilog
Opentimer
⭐
202
A High-performance Timing Analysis Tool for VLSI Systems
Red Pitaya Notes
⭐
198
Notes on the Red Pitaya Open Source Instrument
Ridecore
⭐
196
RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.
Piccolo
⭐
196
RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)
Litepcie
⭐
195
Small footprint and configurable PCIe core
Verilog 6502
⭐
191
A Verilog HDL model of the MOS 6502 CPU
Fpga_nes
⭐
190
FPGA-based Nintendo Entertainment System Emulator
Biriscv
⭐
185
32-bit Superscalar RISC-V CPU
Verilog Generator Of Neural Net Digit Detector For Fpga
⭐
181
Verilog Generator of Neural Net Digit Detector for FPGA
Fpga
⭐
174
The USRP™ Hardware Driver FPGA Repository
Tinyfpga B Series
⭐
172
Open source design files for the TinyFPGA B-Series boards.
Kestrel
⭐
170
The Kestrel is a family of home-made computers, built as much as possible on open-source technology, and supporting as much as possible the open-source philosophy.
Fpga Chip8
⭐
169
CHIP-8 console on FPGA
Basejump_stl
⭐
168
BaseJump STL: A Standard Template Library for SystemVerilog
Accdnn
⭐
167
A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
Poprc
⭐
166
A Compiler for the Popr Language
Verilog Uart
⭐
165
Verilog UART
Sdram Controller
⭐
165
Verilog SDRAM memory controller
Metroboy
⭐
165
MetroBoy - A playable, circuit-level simulation of an entire Game Boy
Verilog I2c
⭐
164
Verilog I2C interface for FPGA implementation
Wb2axip
⭐
164
Bus bridges and other odds and ends
Kryon
⭐
161
FPGA,Verilog,Python
Sv Parser
⭐
159
SystemVerilog parser library fully complient with IEEE 1800-2017
Fpga_readings
⭐
157
Recipe for FPGA cooking
Fpg1
⭐
156
PDP-1 FPGA implementation in Verilog, with CRT, Teletype and Console.
Degate
⭐
154
Open source software for chip reverse engineering.
Openwifi Hw
⭐
154
FPGA/hardware design of openwifi
Cnn Fpga
⭐
149
使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用
Learning Nvdla Notes
⭐
147
NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:
[email protected]
Sha256
⭐
145
Hardware implementation of the SHA-256 cryptographic hash function
Tinytpu
⭐
142
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
Logic
⭐
139
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
Sv2v
⭐
138
SystemVerilog to Verilog conversion
Slang
⭐
137
SystemVerilog compiler and language services
Openfpgaduino
⭐
135
All open source file and project for OpenFPGAduino project
1-100 of 234 projects
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Advertising
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Application Programming Interfaces
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📦 192
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📦 78
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📦 73
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📦 113
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📦 80
Code Quality
📦 28
Collaboration
📦 32
Command Line Interface
📦 49
Community
📦 83
Companies
📦 60
Compilers
📦 63
Computer Science
📦 80
Configuration Management
📦 42
Content Management
📦 175
Control Flow
📦 213
Data Formats
📦 78
Data Processing
📦 276
Data Storage
📦 135
Economics
📦 64
Frameworks
📦 215
Games
📦 129
Graphics
📦 110
Hardware
📦 152
Integrated Development Environments
📦 49
Learning Resources
📦 166
Legal
📦 29
Libraries
📦 129
Lists Of Projects
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Machine Learning
📦 347
Mapping
📦 64
Marketing
📦 15
Mathematics
📦 55
Media
📦 239
Messaging
📦 98
Networking
📦 315
Operating Systems
📦 89
Operations
📦 121
Package Managers
📦 55
Programming Languages
📦 245
Runtime Environments
📦 100
Science
📦 42
Security
📦 396
Social Media
📦 27
Software Architecture
📦 72
Software Development
📦 72
Software Performance
📦 58
Software Quality
📦 133
Text Editors
📦 49
Text Processing
📦 136
User Interface
📦 330
User Interface Components
📦 514
Version Control
📦 30
Virtualization
📦 71
Web Browsers
📦 42
Web Servers
📦 26
Web User Interface
📦 210