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Search results for verilog fpga
fpga
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verilog
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776 search results found
Usb_cdc
⭐
131
Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs
Tekno Kizil
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129
KASIRGA - KIZIL Takımı Teknofest 2023 Çip Tasarımı - KIZIL İşlemci Projesi
Usb3_pipe
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126
USB3 PIPE interface for Xilinx 7-Series
Vgasim
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124
A Video display simulator
A2o
⭐
123
Image Processing
⭐
123
Image Processing Toolbox in Verilog using Basys3 FPGA
Corescore
⭐
122
CoreScore
Accdnn
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121
A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
Logic
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121
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
Fpga Can
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121
An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。
Dspfilters
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119
A collection of demonstration digital filters
Ice40_ultraplus_examples
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115
Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
Fpga_based_cnn
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113
FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.
Simplevout
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112
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
Sofa
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111
SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA
Tinytpu
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111
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
Cnn Fpga
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109
使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用
Icestation 32
⭐
107
Compact FPGA game console
Haasoscope
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107
Docs, design, firmware, and software for the Haasoscope
Tang_e203_mini
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103
LicheeTang 蜂鸟E203 Core
Softmc
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103
SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. The design, the interface, and its capabilities and limitations are discussed in our HPCA 2017 paper: "SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies" <https://people.inf.ethz.ch/omutlu/pub/softMC_hpca
Ice Chips Verilog
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99
IceChips is a library of all common discrete logic devices in Verilog
Panologic G2
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96
Pano Logic G2 Reverse Engineering Project
Fpga Application Development And Simulation
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96
《FPGA应用开发和仿真》(机械工业出版社2018年第1版 ISBN:9787111582786)的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
Mobilenet In Fpga
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96
Generator of verilog description for FPGA MobileNet implementation
Ice40_examples
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94
Public examples of ICE40 HX8K examples using Icestorm
Sdspi
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91
SD-Card controller, using a SPI interface that is (optionally) shared
Oldland Cpu
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89
Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools
Kamikaze
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88
Light-weight RISC-V RV32IMC microcontroller core.
Neogeofpga Sim
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87
Simulation only cartridge NeoGeo hardware definition
Karuta
⭐
87
Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.
Tapasco
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87
The Task Parallel System Composer (TaPaSCo)
Blarney
⭐
86
Haskell library for hardware description
Lispmicrocontroller
⭐
85
A microcontroller that natively executes a simple LISP dialect
Fpga Ddr Sdram
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83
An AXI4-based DDR1 controller to realize mass, cheap memory for FPGA. 基于FPGA的DDR1控制器,为低端FPGA嵌入式系统提供廉价、大容量的存储。
Vt52 Fpga
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83
Dpll
⭐
82
A collection of phase locked loop (PLL) related projects
Yosys F4pga Plugins
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81
Plugins for Yosys developed as part of the F4PGA project.
Fpga Rocket Chip
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79
Wrapper for Rocket-Chip on FPGAs
Cnn_for_slr
⭐
79
A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.
Openarty
⭐
77
An Open Source configuration of the Arty platform
Skrskr
⭐
76
The second place winner for DAC-SDC 2020
Yarvi
⭐
76
Yet Another RISC-V Implementation
Limesdr Usb_gw
⭐
76
Altera Cyclone IV FPGA project for the USB 3.0 LimeSDR board
Fpga Cnn
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76
FPGA implementation of Cellular Neural Network (CNN)
Xilinx Serial Miner
⭐
75
Bitcoin miner for Xilinx FPGAs
Ice40
⭐
75
Lattice iCE40 FPGA experiments - Work in progress
Skynet
⭐
75
Mipsfpga Plus
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74
MIPSfpga+ allows loading programs via UART and has a switchable clock
Jt51
⭐
74
YM2151 clone in verilog. FPGA proven.
Fpga Nfc
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73
Build an NFC (RFID) card reader using FPGA and simple circuit instead of RFID-specfic chip. 用FPGA+分立器件电路搭建一个NFC(RFID)读卡器,不需要专门的RFID芯片。
Fpgaboy
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73
Implementation Nintendo's GameBoy console on an FPGA
Keyboard
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72
客制化机械键盘——从0开始全套资料
J1sc
⭐
72
A reimplementation of a tiny stack CPU
Rt
⭐
71
A Full Hardware Real-Time Ray-Tracer
Fpga Sdfake
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69
Imitate SDcard using FPGAs. 使用FPGA模拟(伪装) SD卡。
Core_ddr3_controller
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69
A DDR3 memory controller in Verilog for various FPGAs
Cordic
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68
A series of CORDIC related projects
Open Nic Shell
⭐
67
AMD OpenNIC Shell includes the HDL source files
Wbscope
⭐
67
A wishbone controlled scope for FPGA's
Filament
⭐
66
Fearless hardware design
Fakepga
⭐
66
Simulating Verilog designs on a microcontroller
Spydrnet
⭐
66
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
Agc
⭐
65
FPGA Based Apollo Guidance Computer
C5soc_opencl
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65
DE1SOC DE10-NANO DE10-Standard OpenCL hardware that support VGA and desktop. And Some applications such as usb camera YUYV to RGB , Sobel and so on.
Antikernel
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65
The Antikernel operating system project
Display_controller
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64
FPGA display controller with support for VGA, DVI, and HDMI.
Tinyfpga_bx_usbserial
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63
USB Serial on the TinyFPGA BX
Pasc
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62
Parallel Array of Simple Cores. Multicore processor.
Sega System For Fpga
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61
FPGA Sega in Verilog, for Xilinx Virtex, circa 2002. Has an emulator thrown in, to simplify FPGA debugging.
Doppler
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61
Arduino compatible – Cortex M4F & FPGA Development Board
Uh Jls
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61
FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器,用来进行无损图像压缩。
Cnn_open
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60
A hardware implementation of CNN, written by Verilog and synthesized on FPGA
Jtframe
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59
Common framework for MiST(er), PocketFPGA, SiDi, NeptUNO (mc/mc2) core development. With special focus on arcade cores.
Fpga Odysseus
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58
FPGA Odysseus with ULX3S
Oc Accel
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58
OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology
Sump2
⭐
57
open-source logic analyzer for FPGAs
Fpga Png Decoder
⭐
57
An FPGA-based PNG image decoder, which can extract original pixels from PNG files. 基于FPGA的PNG图象解码器,可以从PNG文件中解码出原始像素。
Verilog Uart
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56
3 modules: UART receiver, UART transmitter, UART to AXI4 master. 3个模块:UART接收器、UART发送器、UART转AXI4交互式调试器
Issie
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56
Issie - an intuitive cross-platform hardware design application. https://tomcl.github.io/issie
Fpga Mpeg2 Encoder
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56
FPGA-based high performance MPEG2 encoder for video compression. 基于 FPGA 的高性能 MPEG2 视频编码器,可实现视频压缩。
Intfftk
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56
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
Reindeer
⭐
56
PulseRain Reindeer - RISCV RV32I[M] Soft CPU
Fpga Md5 Cracker
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55
A 64-stage pipelined MD5 implementation written in verliog. Runs reliably on a DE0-Nano at 100mhz, computing 100 million hashes per second.
Dslogic Hdl
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55
An open source FPGA design for DSLogic
Fpga Sata Hba
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54
A SATA host (HBA) core based on Xilinx FPGA with GTH. Easy to read/write hard disk. 一个基于Xilinx FPGA中的GTH的SATA host控制器,用来读写硬盘。
Riscy Soc
⭐
54
Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog
Openfpga Pong
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53
FPGA Pong implementation, specifically for the Analogue Pocket
Uniplug Fpga
⭐
53
体积小、低成本、易用、扩展性强的 FPGA 核心板
Cep
⭐
53
The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.
Vidorfpga
⭐
53
repository for Vidor FPGA IP blocks and projects
Up5k
⭐
53
Upduino v2 with the ice40 up5k FPGA demos
Timetoexplore
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52
Source code to accompany https://timetoexplore.net
Fpga Tx
⭐
52
FPGA based transmitter
Corsair
⭐
52
Control and Status Register map generator for HDL projects
Fpga Sdcard Reader Spi
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52
An FPGA-based SD-card reader via SPI bus, which can read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器(通过SPI总线),可以从FAT16或FAT32格式的SD卡中读取文件。
Icebreaker Workshop
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52
iCEBreaker Workshop
Netv Fpga
⭐
52
verilog FPGA code for NeTV
Fpga Rmii Smii
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51
An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII,用来连接LAN8720、KSZ8041TLI-S等
Fpga Gzip Compressor
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51
FPGA-based GZIP (deflate) compressor. Input raw data and output standard GZIP format (as known as .gz file format). 基于 FPGA 的流式 GZIP 压缩器。输入原始数据,输出标准的 GZIP 格式,即常见的 .gz / .tar.gz 文件的格式。
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