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Fpga Ddr Sdram

An AXI4-based DDR1 controller to realize mass, cheap memory for FPGA. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。
Stars
83
License
gpl-3.0
Open Issues
0
Most Recent Commit
7 months ago
Programming Language
Verilog
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Repo
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