Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
---|---|---|---|---|---|---|---|---|---|---|
Verilog Ethernet | 1,768 | 3 months ago | 98 | mit | Verilog | |||||
Verilog Ethernet components for FPGA implementation | ||||||||||
Fpga Rmii Smii | 51 | 7 months ago | gpl-3.0 | Verilog | ||||||
An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII,用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。 | ||||||||||
Wiki | 31 | 7 years ago | Verilog | |||||||
Ethernet_10ge_mac_sv_uvm_tb | 30 | 6 years ago | Verilog | |||||||
SystemVerilog-based UVM testbench for an Ethernet 10GE MAC core | ||||||||||
Ethmac | 19 | 5 years ago | Verilog | |||||||
Ethernet MAC 10/100 Mbps | ||||||||||
Picorv32_xilinx | 19 | 4 years ago | mit | Verilog | ||||||
A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz | ||||||||||
Nfmac10g | 17 | 7 years ago | Verilog | |||||||
Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC | ||||||||||
Ethernet_10ge_mac_sv_tb | 16 | 8 years ago | Verilog | |||||||
SystemVerilog testbench for an Ethernet 10GE MAC core | ||||||||||
Ethpipe | 14 | 9 years ago | 1 | Verilog | ||||||
EtherPIPE: an Ethernet character device for packet processing | ||||||||||
Dvp_to_udp | 11 | 3 years ago | gpl-3.0 | Verilog | ||||||
Uncompressed video uver UDP using 1000BASE-T Ethernet on Cyclone IV FPGA |