Cnn Fpga
使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Convolution_network_on_fpga | 187 | 6 years ago | 15 | Verilog | ||||||
| CNN acceleration on virtex-7 FPGA with verilog HDL | ||||||||||
| Cnn Fpga | 109 | 6 years ago | 3 | mit | Verilog | |||||
| 使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用 | ||||||||||
| Cnn_for_slr | 79 | 4 months ago | bsd-2-clause | Verilog | ||||||
| A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA. | ||||||||||
| Fpga Cnn | 76 | 6 years ago | mit | Verilog | ||||||
| FPGA implementation of Cellular Neural Network (CNN) | ||||||||||
| Cnn_open | 60 | 5 years ago | Coq | |||||||
| A hardware implementation of CNN, written by Verilog and synthesized on FPGA | ||||||||||
| Clacc | 51 | 6 years ago | mit | Verilog | ||||||
| Deep Learning Accelerator (Convolution Neural Networks) | ||||||||||
| Cnn Accelerator Vlsi | 48 | a year ago | 1 | apache-2.0 | Verilog | |||||
| Convolutional accelerator kernel, target ASIC & FPGA | ||||||||||
| Cnnhwpe | 46 | 2 years ago | 2 | Verilog | ||||||
| Convolutional Neural Network | 37 | 7 years ago | 4 | Verilog | ||||||
| Implementation of CNN using Verilog | ||||||||||
| Deepsocflow | 28 | 4 months ago | apache-2.0 | Python | ||||||
| An Open Workflow to Build Custom SoCs and run Deep Models at the Edge | ||||||||||
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