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Search results for fpga xilinx

295 search results found

Bluespecpcie ⭐ 37

PCIe library for the Xilinx 7 series FPGAs in the Bluespec language

Brianhg Ddr3 Controller ⭐ 34

DDR3 Controller v1.60, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.

Xilinx Ise Makefile ⭐ 34

An example of how to use the Xilinx ISE toolchain from the command line

Panologic ⭐ 34

PanoLogic Zero Client G1 reverse engineering info

hardware library for hwt (= ipcore repo)

Hyperram ⭐ 33

Portable HyperRAM controller

Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.

Vhdl Hdmi Out ⭐ 33

HDMI Out VHDL code for 7-series Xilinx FPGAs

Cnn_hardware_acclerator_for_fpga ⭐ 32

This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Networks on FPGAs

Fpga_ntp_server ⭐ 32

A FPGA implementation of the NTP and NTS protocols

LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled

Mksocfpga ⭐ 31

Hostmot2 FPGA code for SoC/FPGA platforms from Altera and Xilinx

A Python package to use FPGA development tools programmatically.

Constraints ⭐ 31

Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards

Fp23fftk ⭐ 31

Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).

Pico_dma ⭐ 29

Autonomous pre-boot DMA attack hardware implant for M.2 slot based on PicoEVB development board

Custom_part_data_files ⭐ 28

Xilinx PCIe to MIG DDR4 example designs and custom part data files

Xilinx Risc V ⭐ 26

Porting PicoRV32 to Artix-7 and Spartan-7. Generic vivado template for supported Xilinx FPGA is included.

mirror of https://git.elphel.com/Elphel/x393

Fpgatools ⭐ 25

Tools for FPGA development.

Displayport ⭐ 25

DisplayPort IP-core

A SoC implementation of a PDP-8/I for the PiDP-8/I console

A simple implementation of a UART modem in Verilog.

Hwac_object_tracker ⭐ 24

FPGA accelerated TinyYOLO v2 object detection neural network

FPGA based 30ps RMS TDCs

mirror of https://git.elphel.com/Elphel/eddr3

Scoreboard Wtimer ⭐ 23

Objective of this project was to emulate a Basketball scoreboard, with timer and two teams scores. See readme for pic and more details. FPGA design with Vivado.

Ebaz4205 ⭐ 22

Vivado and PetaLinux projects for Zynq EBAZ4205 Board

Parallella ⭐ 22

START HERE! FPGA and Linux Development Combined

My Verilog Examples ⭐ 22

A place to keep my synthesizable verilog examples.

N.i.g.e. Machine ⭐ 22

A user-expandable micro-computer system that runs on an FPGA development board and includes the FORTH software language. The system is currently hosted on the Digilent Nexys 4 and Nexys 4 DDR

Nanocounter ⭐ 22

An FPGA/STM32 based frequency counter with an Android user interface

Make_for_vivado ⭐ 21

experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.

Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ

Openhbmc ⭐ 21

Open-source high performance AXI4-based HyperRAM memory controller

Xilinx_base_runtime ⭐ 21

Scalable, Portable and Distributed Gradient Boosting

Eda Scripts ⭐ 20

Collect of various scripts for helping work with EDA-tools (ASIC, FPGA, etc)

Fpga Docker ⭐ 20

Tools for running FPGA vendor toolchains with Docker

Rapidsmith2 ⭐ 19

RapidSmith2 - the Vivado successor to RapidSmith. Released Jan 4, 2017.

Verilog Fpga ⭐ 19

Many peripherals in Verilog ready to use

Opencl_xilinx Intel_heterocl ⭐ 19

This is a repo which contains some details about how to use OpenCL backend (Xilinx/Intel).

Poc Examples ⭐ 19

This repository contains synthesizable examples which use the PoC-Library.

FPGA acceleration of arbitrary precision floating point computations.

Virtio implementation in SystemVerilog

Zcu104_ubuntu ⭐ 18

A project to demonstrate Xilinx MPSOC running Ubuntu

Clash Compucolor2 ⭐ 18

Clash implementation of the Compucolor II home computer

Picoblaze Library ⭐ 18

The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a Chip (SoC or SoFPGA).

Hpcc_fpga ⭐ 17

A OpenCL-based FPGA benchmark suite for HPC

Alternative Logic16 Firmware

XRM (Xilinx FPGA Resource Manager) Document:

ZyncMV is an open source machine/computer vision platform using the Xilinx Zync FPGA+ ARM Cortex A9 SoC

Dual FMC FPGA carrier board developed for general purpose use in particle accelerator electronics instrumentation.

IP prototyping in FPGA hardware

Data Analytics ⭐ 16

Vivado Docker ⭐ 16

Dockerfile with Vivado for CI

Zc_pcie_dma ⭐ 15

DMA attacks over PCI Express based on Xilinx Zynq-7000 series SoC

Sign_language_mnist ⭐ 15

Tutorial for Vitis AI using the Sign Language MNIST

Sha256hasher ⭐ 15

SHA-256 IP core for ZedBoard (Zynq SoC)

Stereo Vision Fpga ⭐ 15

Real-time binocular stereo vision FPGA system with OV5640 cameras

Tcl_for_fpga ⭐ 15

TCL scripts for FPGA (Xilinx)

Deep Darkfantasy ⭐ 15

Global Dark Mode for ALL apps on ANY platforms.

Anasymod ⭐ 14

A framework for FPGA emulation of mixed-signal systems

Pynq Sobel ⭐ 14

A demo for accelerating sobel in xilinx's fpga pynq

J1eforth ⭐ 14

eForth for the j1 simulator and actual J1 FPGAs

Xilinx Build Scripts ⭐ 14

SCons (make-like) scripts for building FPGA code with Xilinx tools

Pothoszynq ⭐ 14

DMA source and sink blocks for Xilinx Zynq FPGAs

Hammond B3 emulation on Xilinx FPGA

Xilinx_fpga_hls Mapping Neural Network To Hardware ⭐ 14

At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA

Lmac_core1 ⭐ 14

LMAC Core1 - Ethernet 1G/100M/10M

Pqriscv Vexriscv ⭐ 13

VexRiscv reference platforms for the pqriscv project

Nanorv32 ⭐ 13

A small 32-bit implementation of the RISC-V architecture

Hostmot2 Firmware ⭐ 13

HostMot2 FPGA firmware

Change part number or package in a Xilinx 7-series FPGA bitstream

Study Materials ⭐ 12

10g Low Latency Ethernet ⭐ 12

10G Low Latency Ethernet

Keyboard Ip ⭐ 12

PS/2 Keyboard IP written in VHDL for Xilinx FPGA

C16_mister ⭐ 12

Commodore C16 and Plus/4 for MiSTer

Aws F1 Developer Labs ⭐ 12

AWS F1 Xilinx Developer Labs

Awesome Fpga List ⭐ 12

A collection of some awesome public FPGA projects.

Cnn_hw_accelerator ⭐ 12

FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ

Bitfile Interpretation Library for Xilinx Virtex FPGAs

Docker Xilinx ⭐ 12

Package Xilinx FPGA tools into docker containers, useful for CI situations.

OpenN@S: Open-source software to NAS automatic VHDL code generation

Hdl Deflate ⭐ 12

FPGA implementation of deflate (de)compress RFC 1950/1951

Zedboard Eagle Library ⭐ 12

Zedboard Eagle Library

Agile Network Tester with FPGA & multi-cores

Itri Opendla ⭐ 11

OpenDLA for trying the demo and FPGA solution

Logisticregression ⭐ 11

Logistic regression FPGA core

Core_usb_bridge ⭐ 11

USB -> AXI Debug Bridge

Rules_vivado ⭐ 11

Bazel rules for Xilinx Vivado

Digital Hardware Modelling ⭐ 11

Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)

Learnfpga ⭐ 11

Learning to use my miniSpartan6+

Yet another free 8051 FPGA core

Xilinx Deep Learning Nexys4 ⭐ 11

Implemented Darius IP (originally target PYNQ) of convolution and maxpool on Xilinx FPGA with SDK

REAPR (Reconfigurable Engine for Automata Processing) is a general-purpose framework for accelerating automata processing applications such as regular expressions. REAPR is currently only compatible with SDAccel-capable Xilinx FPGA boards.

Zynq Aes ⭐ 11

AES hardware engine for Xilinx Zynq platform

Fpga Mandelbrot ⭐ 11

FPGA mandelbrot accelerator via high speed/super speed USB

Kvm Ip Zynq ⭐ 11

KVM over IP Gateway targeting Zynq-7000 SoC

Cmakemodules ⭐ 11

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