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Search results for verilog fpga

776 search results found

Logisim Evolution ⭐ 4,251

Digital logic design tool and simulator

Openwifi ⭐ 3,363

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

Vexriscv ⭐ 2,135

A FPGA friendly 32 bit RISC-V CPU implementation

Nyuziprocessor ⭐ 1,863

GPGPU microprocessor architecture

Darkriscv ⭐ 1,795

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

E200_opensource ⭐ 1,688

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

Icestudio ⭐ 1,621

❄️ Visual editor for open FPGA boards

Fromthetransistor ⭐ 1,607

From the Transistor to the Web Browser, a rough outline for a 12 week course

Spinalhdl ⭐ 1,451

Scala based HDL

Corundum ⭐ 1,354

Open source FPGA-based NIC and platform for in-network compute

Neorv32 ⭐ 1,337

🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Clash Compiler ⭐ 1,336

Haskell to VHDL/Verilog/SystemVerilog compiler

Basic_verilog ⭐ 1,333

Must-have verilog systemverilog modules

HDL libraries and projects

Silice ⭐ 1,199

Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.

SERV - The SErial RISC-V CPU

Zipcpu ⭐ 1,139

A small, light weight, RISC CPU soft core

Platformio Vscode Ide ⭐ 1,104

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

Fusesoc ⭐ 1,065

Package manager and build abstraction tool for FPGA/ASIC development

Vtr Verilog To Routing ⭐ 925

Verilog to Routing -- Open Source CAD Flow for FPGA Research

The USRP™ Hardware Driver Repository

E203_hbirdv2 ⭐ 741

The Ultra-Low Power RISC-V Core

Openfpga ⭐ 692

An Open-source FPGA IP Generator

🌱 Open source ecosystem for open FPGA boards

Usb_c_industrial_camera_fpga_usb3 ⭐ 610

Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

Edalize ⭐ 573

An abstraction library for interfacing EDA tools

Openwifi Hw ⭐ 560

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

Riscv_vhdl ⭐ 552

Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators

Openpiton ⭐ 545

The OpenPiton Platform

HAL – The Hardware Analyzer

Projf Explore ⭐ 478

Project F brings FPGAs to life with exciting open-source designs you can build on.

Platformio Atom Ide ⭐ 474

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

Vscode Teroshdl ⭐ 457

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

Beagle_sdr_gps ⭐ 446

KiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS

Cascade ⭐ 432

A Just-In-Time Compiler for Verilog from VMware Research

Wb2axip ⭐ 409

Bus bridges and other odds and ends

Kianriscv ⭐ 396

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, linux soc included, .

Apicula ⭐ 390

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

Bsv_tutorial_cn ⭐ 381

一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开

RISC-V CPU Core (RV32IM)

Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

Icesugar ⭐ 320

iCESugar FPGA Board (base on iCE40UP5k)

Fpga Foc ⭐ 319

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor. 基于FPGA的FOC控制器，用于驱动BLDC/PMSM电机。

Tillitis Key1 ⭐ 312

Board designs, FPGA verilog, firmware for TKey, the flexible and open USB security key 🔑

Various HDL (Verilog) IP Cores

Biriscv ⭐ 300

32-bit Superscalar RISC-V CPU

Reduceron ⭐ 296

FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to

Fpga Imaging Library ⭐ 271

An open source library for image processing on FPGA.

🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board

Code generation tool for configuration and status registers

Ustc Rvsoc ⭐ 261

An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC，包含一个简单且可扩展的外设总线。

Nuked Md Fpga ⭐ 259

Mega Drive/Genesis core written in Verilog

Hdlconvertor ⭐ 258

Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4

Openofdm ⭐ 251

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

Fpga_readings ⭐ 249

Recipe for FPGA cooking

F4pga Arch Defs ⭐ 245

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

Nestang ⭐ 245

NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards

Verilog ⭐ 243

Repository for basic (and not so basic) Verilog blocks with high re-use potential

Fpga Usb Device ⭐ 241

An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

Wbuart32 ⭐ 237

A simple, basic, formally verified UART controller

F4pga Examples ⭐ 232

Example designs showing different ways to use F4PGA toolchains.

Verilog Generator Of Neural Net Digit Detector For Fpga ⭐ 231

Verilog Generator of Neural Net Digit Detector for FPGA

Fpga Litecoin Miner ⭐ 231

A litecoin scrypt miner implemented with FPGA on-chip memory.

Ice40 Playground ⭐ 224

Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)

Ip Cores ⭐ 214

A huge collection of VHDL/Verilog open-source IP cores scraped from the web

Chips 2.0 ⭐ 205

FPGA Design Suite based on C to Verilog design flow.

Colorlight Fpga Projects ⭐ 196

current focus on Colorlight i5 and i9 & i9plus module

Dblclockfft ⭐ 195

A configurable C++ generator of pipelined Verilog FFT cores

The USRP™ Hardware Driver FPGA Repository

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

Convolution_network_on_fpga ⭐ 187

CNN acceleration on virtex-7 FPGA with verilog HDL

An open source SPI flash emulator and monitor

Fpga Ftdi245fifo ⭐ 178

FPGA-based USB fast data transmission using FT232H/FT600 chip. 使用FT232H/FT600芯片进行FPGA与电脑之间的高速数据传输。

Async_fifo ⭐ 173

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Fpga_nes ⭐ 173

FPGA-based Nintendo Entertainment System Emulator

Open Register Design Tool ⭐ 169

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.

Fpga Chip8 ⭐ 167

CHIP-8 console on FPGA

Zynq Nvdla ⭐ 165

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

Tinyfpga B Series ⭐ 160

Open source design files for the TinyFPGA B-Series boards.

Autofpga ⭐ 153

A utility for Composing FPGA designs from Peripherals

Connectal ⭐ 153

Connectal is a framework for software-driven hardware development.

Detecthumanfaces ⭐ 151

Real time face detection based on Arm Cortex-M3 DesignStart and FPGA

Awesome Fpga ⭐ 150

A collection of resources on FPGA devices and development in general

Fpga Peripherals ⭐ 149

🌱 ❄️ Collection of open-source peripherals in Verilog

Fomu Workshop ⭐ 148

Support files for participating in a Fomu workshop

Usbcorev ⭐ 146

A full-speed device-side USB peripheral core written in Verilog.

A C++ to Verilog translation tool with some basic guarantees that your code will work.

Fpga Sdcard Reader ⭐ 142

An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。

Icegdrom ⭐ 142

An FPGA based GDROM emulator for the Sega Dreamcast

Fpga Jpeg Ls Encoder ⭐ 141

An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码器，可实现高压缩率的无损/近无损图像压缩。

Hdmi2usb Litex Firmware ⭐ 139

A version of the HDMI2USB firmware based around LiteX tools produced by @Enjoy-Digital (based on misoc+migen created by @M-Labs)

De10 Nano ⭐ 137

Absolute beginner's guide to the de10-nano

Eurorack Pmod ⭐ 137

Hardware and gateware for getting started in FPGA-based audio synthesis with open source tools.

Open5g_phy ⭐ 135

A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog

Openfpgaduino ⭐ 135

All open source file and project for OpenFPGAduino project

Zynq7010_eink_controller ⭐ 133

这是一个基于Zynq7010的Eink控制器在ED097TC2上高质量显示帧数高达10FPS

Usb_cdc ⭐ 131

Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs

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