Fp23fftk
Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Parallella Examples | 375 | 5 years ago | 3 | VHDL | ||||||
| Community created parallella projects | ||||||||||
| Intfftk | 56 | a year ago | gpl-3.0 | VHDL | ||||||
| Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0. | ||||||||||
| Rfsoc_sam | 46 | a year ago | 2 | bsd-3-clause | VHDL | |||||
| RFSoC Spectrum Analyser Module on PYNQ. | ||||||||||
| Fpga Fft | 42 | 3 years ago | 1 | other | VHDL | |||||
| A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm | ||||||||||
| Fp23fftk | 31 | 2 years ago | gpl-3.0 | VHDL | ||||||
| Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL). | ||||||||||
| Fpga Speech Recognition | 28 | 6 years ago | gpl-3.0 | VHDL | ||||||
| Expiremental Speech Recognition System using VHDL & MATLAB. | ||||||||||
| Design And Asic Implementation Of 32 Point Fft Processor | 20 | 5 months ago | mit | Verilog | ||||||
| I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. A single-path delay commutator processing element (SDC PE) has been proposed for the first time. It saves a complex adder compared with the typical radix-2 butterfly unit. The new pipelined architecture can be built using the proposed processing element. The proposed architecture can lead to 100% hardware utilization and 50% reduction in the overall number of adders required in the conventional pipelined FFT designs. In order to produce the output sequence in normal order, we also present a bit reverser, which can achieve a 50% reduction in memory usage. | ||||||||||
| Fft | 16 | 5 years ago | other | VHDL | ||||||
| synthesizable FFT IP block for FPGA designs | ||||||||||
| Math | 15 | 4 years ago | n,ull | gpl-3.0 | MATLAB | |||||
| Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.) | ||||||||||
| Spectrum | 12 | 6 years ago | VHDL | |||||||
| Spectrum analyzer system using a 512-point FFT, in a Cyclone IV FPGA. Reads i2s audio from the codec and then does all FFT/VGA functions. Nios just reads the FFT result and draws the display bars. VGA frame buffer on-chip. VGA signals generated on-chip. See the included video files to watch it in action. | ||||||||||
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