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Search results for fpga vhdl

373 search results found

Screen Pong ⭐ 33

Pong game in a free FPGA.

Vhdl Hdmi Out ⭐ 33

HDMI Out VHDL code for 7-series Xilinx FPGAs

Hyperram ⭐ 33

Portable HyperRAM controller

Mister2mega65 ⭐ 31

Framework to simplify porting MiSTer (and other) cores to the MEGA65

Mksocfpga ⭐ 31

Hostmot2 FPGA code for SoC/FPGA platforms from Altera and Xilinx

Fp23fftk ⭐ 31

Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).

Everything to do with the XuLA FPGA board: schematics, layout, firmware, example FPGA designs, documentation, etc.

Cross EDA Abstraction and Automation

Fpga Spectrum ⭐ 30

Sinclair ZX Spectrum 48k and 128k on an Altera DE1 FPGA board

Odrivefpga ⭐ 30

High performance motor control

Fpga Fast ⭐ 29

FPGA FAST image feature detector implementation in VHDL

Fpga_examples ⭐ 29

Example code in vhdl to help starting new projects using FPGA devices.

Fpga Speech Recognition ⭐ 28

Expiremental Speech Recognition System using VHDL & MATLAB.

Fpgacosmacelf ⭐ 26

This re-creation of a cosmic ELF computer, Coded in SpinalHDL

Compliance Tests ⭐ 25

Tests to evaluate the support of VHDL 2008 and VHDL 2019 features

Hdlconvertorast ⭐ 25

Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator

Videoconditioner ⭐ 25

RGB video input for Altera DE1 board + PAL Modulator

FPGA development platform for high-performance RF and digital design

Openmixr ⭐ 24

4k Mixed Reality headset

Pano_man ⭐ 24

Simulation of the classic Pacman arcade game on a PanoLogic thin client.

Face Detection On Fpga ⭐ 23

This a complete and fully working Viola-Jones face detection algorithm described in VHDL and verified on the DE2-115 FPGA board.

Fpga Radio ⭐ 23

Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC

FPGA based 30ps RMS TDCs

Spaceinvadersfpgagame ⭐ 23

Verilog implementation of the classic arcade game Space Invaders for the Zedboard FPGA board

N.i.g.e. Machine ⭐ 22

A user-expandable micro-computer system that runs on an FPGA development board and includes the FORTH software language. The system is currently hosted on the Digilent Nexys 4 and Nexys 4 DDR

VT100-style terminal implemented on FPGA in VHDL

Fpga_torture ⭐ 22

🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.

Dram Bender ⭐ 21

DRAM Bender is the first open source DRAM testing infrastructure that can be used to easily and comprehensively test state-of-the-art DDR4 modules of different form factors. Five prototypes are available on different FPGA boards. Described in our preprint: https://arxiv.org/pdf/2211.05838.pdf

Zipml Xeonfpga ⭐ 21

FPGA-based stochastic gradient descent (powered by ZipML - Low-precision machine learning on reconfigurable hardware)

Fpga_cores ⭐ 21

Pythonuberhdl ⭐ 20

Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL

Rgbmatrix Fpga ⭐ 20

Adafruit RGB LED Matrix Display Driver for use with FPGAs (written in VHDL)

Paas_v1.0 ⭐ 20

PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems

Ndk App Minimal ⭐ 20

Minimal Application based on Network Development Kit (NDK) for FPGA cards

Fpga Docker ⭐ 20

Tools for running FPGA vendor toolchains with Docker

LLVM based HLS library for HWToolkit (hardware devel. toolkit)

Simple SoC in VHDL with full toolchain and custom board.

Karabas Pro ⭐ 20

FPGA based retrocomputer with FDD and HDD controllers

Design And Asic Implementation Of 32 Point Fft Processor ⭐ 20

I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. A single-path delay commutator processing element (SDC PE) has been proposed for the first time. It saves a complex adder compared with the typical radix-2 butterfly unit. The new pipelined architecture can be built using the proposed processing element. The proposed architecture can lead to 100% hardware utilization and 50% reduction in the overall number of a

Tang_nano_20k_c64 ⭐ 19

c64 living in a Gowin GW2AR FPGA on a Sipeed Tang Nano 20k with HDMI Video and Audio Output

BBot! An open source, wireless beer serving robot reference design featuring a C++ program running on a BeagleBone Black, a .Net WPF control GUI and even low level FPGA integration!

Library of reusable VHDL components

IEEE 754 floating point library in system-verilog and vhdl

Poc Examples ⭐ 19

This repository contains synthesizable examples which use the PoC-Library.

Picoblaze Library ⭐ 18

The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a Chip (SoC or SoFPGA).

Camera Tracking ⭐ 18

Our project is the system that enables a moving c doing this by having a camera mounted to a swivel direction to be controlled. The camera data will b recognition algorithm will be used to identify an moved to keep the object in the field of vision. I

Ep2c5 Cyclone Ii Mini Board ⭐ 18

EP2C5 Cyclone II Mini Board

Psi_common ⭐ 18

Common elements for FPGA Design (FIFOs, RAMs, etc.)

Fpga Cryptoparty ⭐ 18

A very very fast VHDL implementation of the WPA2 encryption algorithm.

Arcade Galaga ⭐ 18

Namco Galaga Compatible Gateware IP Core for FPGA

Elasticc ⭐ 18

lightweight open HLS for FPGA rapid prototyping

Ntsc Composite Encoder ⭐ 18

How to generate NTSC compliant(?) composite color video with an FPGA

Cnn_vhdl_generator ⭐ 18

AUTOMATIC VHDL GENERATION FOR CNN MODELS

Super Reu ⭐ 18

An advanced FPGA-based ram expansion module for C64/C128

Robotron Fpga ⭐ 18

FPGA implementation of Robotron: 2084

My TI-99/4A clone, two versions: FPGA+TMS99105 CPU and FPGA with my CPU core

A Simple FPGA Implementation of the Nintendo Entertainment System

Open FPGA Modules

Handwritten Digit Recognition Painter ⭐ 18

A handwritten digit recognition painter implementation on Basys 3 Artix-7 FPGA using Verilog.

Audioxtreamer ⭐ 17

ASIO driver, Usb Driver, FX2LP Firmware, VHDL Fpga, Schematics & PCB Layout for the AudioXtreamer, a USB 2.0 32ch Audio/Midi interface for retrofitting into digital mixers/interfaces.

Hashvoodoo Fpga Bitcoin Miner ⭐ 17

HashVoodoo FPGA Bitcoin Miner

VHDL description of the custom Demolicious GPU. Built during a single semester at NTNU

Alternative Logic16 Firmware

Fpga Ov2640 ⭐ 17

This project uses verilog to implement interaction with OV2640 camera, Bluetooth slave module and VGA display on FPGA.

Sphinx Vhdl ⭐ 17

Ti 99_4a_mister ⭐ 17

Texas Instrument 99/4A Home Computer

Spartan Edge Accelerator Graphical System ⭐ 16

WIP Graphics layer and inter IC communication for the Spartan Edge Accelerator fpga/mcu hybrid board

Async Click Library ⭐ 16

Verilog Convolutional Neural Network on PYNQ

Icyradio ⭐ 15

Over-engineered SDR development board

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

Pid Fpga Vhdl ⭐ 15

This project was part of the VLSI Lab. It implements PID control using an FPGA.

Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)

Second_order_sigma_delta_dac ⭐ 15

A comparison of 1st and 2nd order sigma delta DAC for FPGA

Fmh_gpib_core ⭐ 15

GPIB IEEE 488.1 core

Ghdl Yosys Blink ⭐ 15

Blink an LED on an FPGA in VHDL using ghdl, yosys and nextpnr

FuseSoc Verification Automation

Lmac_core1 ⭐ 14

LMAC Core1 - Ethernet 1G/100M/10M

Arcade Xevious ⭐ 14

Namco Xevious Compatible Gateware IP Core

Vhdl_prng ⭐ 14

Pseudo Random Number Generators as synthesizable VHDL code

Digital Resources ⭐ 14

Aes Gcm 128 192 256 Bits ⭐ 14

Configurable AES-GCM IP (128, 192, 256 bits)

Fpga Bbc ⭐ 14

Acorn BBC Micro on an Altera DE1 FPGA board

Pandablocks Fpga ⭐ 14

VHDL functional blocks with their simulations and test sequences

Implementation of Amiga 500/1200 in Altera Cyclone IV FPGA

Pothoszynq ⭐ 14

DMA source and sink blocks for Xilinx Zynq FPGAs

Awesome Hdl ⭐ 14

A curated list of awesome HDL, libraries, typical implementation and references.

Simple Riscv ⭐ 13

A simple three-stage RISC-V CPU

Audio Signal Processing SoC

A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration

Hostmot2 Firmware ⭐ 13

HostMot2 FPGA firmware

Altera Cyclone Ii Ep2c5t144 Blink ⭐ 13

A very junior "Hello World" for the low price Altera Cypress II EP2C5T144 FPGA Mini dev board from amazon/ebay

Wb_spi_bridge ⭐ 12

🌉 A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).

Ulx3s.github.io ⭐ 12

community projects that can be used with the ULX3S FPGA ESP32 board

16 bit RISC-V proof of concept

LinuxCNC FPGA board port to LiteX

OpenN@S: Open-source software to NAS automatic VHDL code generation

Omi_device_ice ⭐ 12

An example OMI Device FPGA with 2 DDR4 memory ports

Keyboard Ip ⭐ 12

PS/2 Keyboard IP written in VHDL for Xilinx FPGA

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