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5 search results found
Xls
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1,087
XLS: Accelerated HW Synthesis
Bazel_rules_hdl
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90
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
Rules_verilator
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16
Bazel build rules for Verilator
Rules_vivado
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11
Bazel rules for Xilinx Vivado
Ncore
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6
A RISCV processor in system verilog
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