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Search results for verilog fpga

776 search results found

FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope

Open Cryptonight Asic ⭐ 16

Open source hardware implementation of classic CryptoNight

Double Dragon FPGA core

The_enigma_project ⭐ 16

An open source FPGA Enigma Machine created with Icestudio and Verilog

Zuma Fpga ⭐ 16

Fine Grain FPGA Overlay Architecture and Tools

Ics Adpcm ⭐ 16

Programmable multichannel ADPCM decoder for FPGA

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

Verilog Convolutional Neural Network on PYNQ

Sha256hasher ⭐ 15

SHA-256 IP core for ZedBoard (Zynq SoC)

Fromthetransistor ⭐ 15

From the Transistor to the Web Browser, a rough outline for a 12 week course.

Cisco Hwic 3g Cdma ⭐ 15

Reverse Engineering of the Cisco HWIC-3G-CDMA PCB

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

Fpga Examples ⭐ 15

FPGA examples for 8bitworkshop.com

Deep Darkfantasy ⭐ 15

Global Dark Mode for ALL apps on ANY platforms.

Fpga Snappy Decompressor ⭐ 15

A new kind of hardware decompressor for Snappy decompression. Much faster than the existing software one.

Sortingnetwork ⭐ 15

Implement a bitonic sorting network on FPGA

Upduino V2.1 ⭐ 15

Face_detect_open ⭐ 15

A Voila-Jones face detector hardware implementation

Jtcontra ⭐ 15

FPGA conversion of KONAMI's K007121-based games: Contra, Combat School, Labyrinth Runner, Fast Lane, MX5000

Arrowzip ⭐ 15

A ZipCPU based demonstration of the MAX1000 FPGA board

A programming language for FPGAs.

Second_order_sigma_delta_dac ⭐ 15

A comparison of 1st and 2nd order sigma delta DAC for FPGA

a hardware-friendly bilateral solver

A ZipCPU demonstration port for the icoboard

Posture_recognition_cnn ⭐ 14

To help machines learn what we human beings are doing via a camera is important. Once it comes true, machines can make different responses to all kinds of human's postures. But the process is very difficult as well, because usually it is very slow and power-consuming, and requires a very large memory space. Here we focus on real-time posture recognition, and try to make the machine "know" what posture we make. The posture recognition system is consisted of DE10-Nano SoC FPGA Kit, a camera, and a

Arty Glitcher ⭐ 14

FPGA-based glitcher for the Digilent Arty FPGA development board.

Tiny Tpu ⭐ 14

Small-scale Tensor Processing Unit built on an FPGA

Digital Resources ⭐ 14

Serv_soc ⭐ 14

SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.

Hardware Implementation Of The Dark Channel Prior Haze Removal Algorithm ⭐ 14

The Dark Channel Prior technique is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boards, including those from Xilinx and Altera.

Awesome Hdl ⭐ 14

A curated list of awesome HDL, libraries, typical implementation and references.

Ov7670_nexys4_verilog ⭐ 14

This code is used to connect the OV7670 Camera to a NEXYS4 and then display the image on a monitor in Verilog

Riscv Atom ⭐ 14

An open-source 32-bit RISC-V soft-core processor for FPGAs.

Anasymod ⭐ 14

A framework for FPGA emulation of mixed-signal systems

De1 Soc Sound ⭐ 14

Mobile Fpga Bluetooth Midi ⭐ 14

Interactive BLE MIDI demo using an iOS app (SwiftUI), an ESP32 (Python) and an FPGA (Verilog)

5a 75b Tools ⭐ 14

a collection of tools made while messing with the Colorlight 5A-75B V7.0 and some notes using ECP5 with Yosys

FPGA Development toolset

EtherPIPE: an Ethernet character device for packet processing

Jtag_interface ⭐ 14

A template for establishing a JTAG connection between the MCU and FPGA chip on the Arduino MKR Vidor 4000

Delta Sigma Dac Verilog ⭐ 14

Delta Sigma DAC FPGA

Gameduino ⭐ 14

My own version of the @JamesBowman's Gameduino file repository

Centaur, a framework for hybrid CPU-FPGA databases

Pitchshifter ⭐ 14

Change the pitch of your voice in real-time!

Nanorv32 ⭐ 13

A small 32-bit implementation of the RISC-V architecture

Rapcores ⭐ 13

Robotic Application Processor

Fftvisualizer ⭐ 13

This project demonstrates DSP capabilities of Terasic DE2-115

Pqriscv Vexriscv ⭐ 13

VexRiscv reference platforms for the pqriscv project

The ZipCPU blog

Mostly AVR compatible FPGA soft-core

Shapool Core ⭐ 13

FPGA core for SHA256d mining targeting Lattice iCE40 devices.

Fpga Sdrlib ⭐ 13

Verilog modules for software-defined radio.

TI-99/4A FPGA implementation for the Icestorm toolchain

Arcade Gng_mister ⭐ 13

Arcade Ghosts'n Goblins for MiSTer

No2hub75 ⭐ 13

Nitro HUB75 LED panel driver FPGA core

Pet2001_arty ⭐ 13

A Commodore PET in an Artix-7 FPGA.

Vp_awsfpga ⭐ 13

Virtual Platform for AWS FPGA support

Study Materials ⭐ 12

Vector06cc ⭐ 12

Вектор-06ц в ПЛИС / Vector-06c in FPGA

Fpga_realtime_and_static_sobel_edge_detection ⭐ 12

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

Omi_device_ice ⭐ 12

An example OMI Device FPGA with 2 DDR4 memory ports

Sparkroad Fpga ⭐ 12

Bugu Computer ⭐ 12

💻 build own computer by fpga.

Iir Bandstop Filter ⭐ 12

Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic

Core_dbg_bridge ⭐ 12

UART -> AXI Bridge

Awesome Fpga List ⭐ 12

A collection of some awesome public FPGA projects.

Ulx3s.github.io ⭐ 12

community projects that can be used with the ULX3S FPGA ESP32 board

RISCV CPU implementation in SystemVerilog

Spinaldev ⭐ 12

Docker Development Environment for SpinalHDL

Veriscala ⭐ 12

Yosys Ice Experiments ⭐ 12

Experiments for iCEstick evaluation board with iCE40HX-1k FPGA - using open source toolchain

Fpga_cryptonight_v7 ⭐ 12

FPGA CryptoNight V7 Minner

Verilog Sid Mos6581 ⭐ 12

MOS6581 SID chip emulator in SystemVerilog

Lit3rick ⭐ 12

An up5k board to manage pulse-echo ultrasound acquisition.

Spectrum ⭐ 12

Spectrum analyzer system using a 512-point FFT, in a Cyclone IV FPGA. Reads i2s audio from the codec and then does all FFT/VGA functions. Nios just reads the FFT result and draws the display bars. VGA frame buffer on-chip. VGA signals generated on-chip. See the included video files to watch it in action.

Openzcore ⭐ 12

powerpc processor prototype and an example of semiconductor startup biz plan

100daysofrtl ⭐ 12

"100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado

Mriscv_vivado ⭐ 12

A 32-bit Microcontroller for NEXYS4-DDR fpga based on mriscv.

Anlogic Picorv32 ⭐ 12

Optimized picorv32 core for anlogic FPGA

Vp2motion ⭐ 12

FPGA based motion controller for RepRap style 3D printers

Ada Picorv32 Example ⭐ 12

Example of Ada code running on the PicoRV32 RISC-V CPU for FPGA

Hdl Deflate ⭐ 12

FPGA implementation of deflate (de)compress RFC 1950/1951

Ssith Aws Fpga ⭐ 12

Host software for running SSITH processors on AWS F1 FPGAs

DyRACT Open Source Repository

Core_dvi_framebuffer ⭐ 11

Minimal DVI / HDMI Framebuffer

Svlogger ⭐ 11

SystemVerilog Logger

Toast Rv32i ⭐ 11

A Pipelined RISC-V RV32I Core in Verilog

Fpganes_release ⭐ 11

Reconstructing NES game console on Altera DE1-SOC FPGA using System Verilog

Rules_vivado ⭐ 11

Bazel rules for Xilinx Vivado

Game Boy Classic fully functional FPGA implementation from scratch

Bubble Bobble arcade compatible verilog core for FPGA

Digital Hardware Modelling ⭐ 11

Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)

Aws Fpga Firesim ⭐ 11

AWS Shell for FireSim

FPGA implementation of DSITx (single lane) used in conjunction with ipod nano 7th gen display

Core_usb_bridge ⭐ 11

USB -> AXI Debug Bridge

Pacman Tangnano9k ⭐ 11

A Pac-Man Arcade implementation for the TangNano9K using HDMI

Arcade Digdug ⭐ 11

Namco Dig Dug Compatible Gateware IP Core

Dilithium ⭐ 11

High-speed full CRYSTALS-DILITHIUM implementation on FPGA: Keygen, Sign, Verify.

Zynq Aes ⭐ 11

AES hardware engine for Xilinx Zynq platform

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