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10 search results found
Vtr Verilog To Routing
⭐
925
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Opentimer
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368
A High-performance Timing Analysis Tool for VLSI Systems
Spydrnet
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66
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
Rdf 2019
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14
DATC RDF
Study Materials
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12
Nem Relay Cad
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12
Parametric NEM relay design with layout generation (KLayout: GDSII, DXF), FEM (Ansys/COMSOL), SPICE models, Liberty models, and more
Switched Multiported Ram
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6
Switched SRAM-based Multi-ported RAM
Bsg_pipeclean_suite
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6
Libcircuit
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6
libCircuit is a C++ Library for EDA software development
Fmcw
⭐
5
6GHz frequency-modulated continuous-wave radar with real-time range detection
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1-10 of 10 search results
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