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Search results for fpga verilator
fpga
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verilator
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28 search results found
Zipcpu
⭐
1,139
A small, light weight, RISC CPU soft core
Cores Veer Eh1
⭐
770
VeeR EH1 core
Edalize
⭐
573
An abstraction library for interfacing EDA tools
Riscv
⭐
364
RISC-V CPU Core (RV32IM)
Cores
⭐
302
Various HDL (Verilog) IP Cores
Biriscv
⭐
300
32-bit Superscalar RISC-V CPU
Wbuart32
⭐
237
A simple, basic, formally verified UART controller
Cores Veer El2
⭐
222
VeeR EL2 Core
Dblclockfft
⭐
195
A configurable C++ generator of pipelined Verilog FFT cores
Async_fifo
⭐
173
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
Autofpga
⭐
153
A utility for Composing FPGA designs from Peripherals
Vgasim
⭐
124
A Video display simulator
Logic
⭐
121
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
Sdspi
⭐
91
SD-Card controller, using a SPI interface that is (optionally) shared
Dpll
⭐
82
A collection of phase locked loop (PLL) related projects
Openarty
⭐
77
An Open Source configuration of the Arty platform
Wbscope
⭐
67
A wishbone controlled scope for FPGA's
Fakepga
⭐
66
Simulating Verilog designs on a microcontroller
Interpolation
⭐
42
Digital Interpolation Techniques Applied to Digital Signal Processing
Wbi2c
⭐
35
Wishbone controlled I2C controllers
Zbasic
⭐
35
A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
S6soc
⭐
24
CMod-S6 SoC
Virtio
⭐
18
Virtio implementation in SystemVerilog
Website
⭐
13
The ZipCPU blog
Ics 2021spring Fdu
⭐
11
Introduction to Computer Systems (II), Spring 2021.
Noop Lo
⭐
9
A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.
Riscv
⭐
8
32-bit soft RISCV processor for FPGA applications
Vga_interface
⭐
6
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