Awesome Open Source
Search
Programming Languages
Languages
All Categories
Categories
About
Search results for flow verilog
flow
x
verilog
x
18 search results found
Silice
⭐
1,199
Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.
Vtr Verilog To Routing
⭐
925
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Openroad Flow Scripts
⭐
233
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/la
Qflow
⭐
164
Qflow full end-to-end digital synthesis flow for ASIC designs
Vsdflow
⭐
121
VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using VSD (RTL-to-GDS) FLOW. VSDFLOW is completely build using OPHW tools, where the user gives input RTL in verilog. From here on the VSDFLOW takes control, RTL is synthesized (using Yosys). The synthesized netlist is given to PNR tool (Qflow) and finally Sign-off is done with STA tool (using Ope
Openlane2
⭐
99
The next generation of OpenLane, rewritten from scratch with a modular architecture
Svut
⭐
59
SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!
Alpha Release
⭐
51
Builds, flow and designs for the alpha release
Fasoc
⭐
50
Xeda
⭐
30
Cross EDA Abstraction and Automation
Datc_robust_design_flow
⭐
15
DATC Robust Design Flow.
Tpu Tensor Processing Unit
⭐
14
IC implementation of TPU
Rdf 2019
⭐
14
DATC RDF
Datuner
⭐
10
DATuner Repository
Vsdstdcelldesign
⭐
9
This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an openlane flow.
S Link
⭐
8
An Open Source Link Protocol and Controller
Hardware Traffic Classifier
⭐
6
FPGA-based traffic classifier using the SVM algorithm
Pulsar
⭐
5
Pulsar asynchronous synthesis framework
Related Searches
Javascript Flow (2,624)
Python Flow (1,575)
Verilog Fpga (1,343)
Java Flow (873)
C Plus Plus Flow (568)
Cpu Verilog (330)
Python Verilog (267)
Verilog Xilinx (265)
Verilog Vhdl (249)
Verilog Systemverilog (230)
1-18 of 18 search results
Privacy
|
About
|
Terms
|
Follow Us On Twitter
Copyright 2018-2024 Awesome Open Source. All rights reserved.