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Search results for fpga dsp
dsp
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fpga
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36 search results found
Dsp Theory
⭐
792
Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.
Notes
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365
研究生阶段的一些文章(技术、思考、读书笔记、日常琐事等)
Ua3reo Ddc Transceiver
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293
DDC/DUC SDR Tranceiver project
Fxpmath
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154
A python library for fractional fixed-point (base 2) arithmetic and binary manipulation with Numpy compatibility.
Maia Sdr
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144
Maia SDR is an open-source FPGA-based SDR project focusing on the ADALM Pluto
Dspfilters
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119
A collection of demonstration digital filters
Ice40_ultraplus_examples
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115
Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
Pyrpl
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113
pyrpl turns your RedPitaya into a powerful DSP device, especially suitable as a lockbox in quantum optics experiments.
Fpga Application Development And Simulation
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96
《FPGA应用开发和仿真》(机械工业出版社2018年第1版 ISBN:9787111582786)的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
Caffepresso
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80
CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based platforms
Cordic
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68
A series of CORDIC related projects
Intfftk
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56
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
P4fpga
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46
P4-14/16 Bluespec Compiler
Fpga Fft
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42
A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
Clash Utils
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42
A collection of reusable Clash designs/examples
Interpolation
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42
Digital Interpolation Techniques Applied to Digital Signal Processing
Dsp_ice
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33
ICE40 8K FPGA / STM32F4 development system
Fp23fftk
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31
Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
E Verest
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29
EVEREST: e-Versatile Research Stick for peoples
Dcc2014
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27
Dsp
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24
Unterlagen zu den Vorlesungen "Digitale Signalverarbeitung (DSV)" und "DSV auf FPGAs"
Myhdl Based Fpga Dsp Toolflow
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21
A library for generating Software Defined Radio-intended DSP code for FPGAs that makes use of the MyHDL (www.myhdl.org) Python library. Targeted at the Rhino Project (see URL).
Hwthls
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20
LLVM based HLS library for HWToolkit (hardware devel. toolkit)
Music_light_cube
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17
Music Light Cube | 音樂全彩光立方(主倉庫)
Math
⭐
15
Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
Lakeroad
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14
FPGA synthesis tool powered by program synthesis
Fftvisualizer
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13
This project demonstrates DSP capabilities of Terasic DE2-115
Telscale Ss7card
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13
Temporary repo of OpenSigtran project
M Blanc
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10
MBLANC: mini Board Lab and Companion
Em070_new Fpga Family For Cnn Architectures High Speed Soft Neuron Design
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10
Who doesn’t dream of a new FPGA family that can provide embedded hard neurons in its silicon architecture fabric instead of the conventional DSP and multiplier blocks? The optimized hard neuron design will allow all the software and hardware designers to create or test different deep learning network architectures, especially the convolutional neural networks (CNN), more easily and faster in comparing to any previous FPGA family in the market nowadays. The revolutionary idea about this project i
Nmigen Examples
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10
I want to learn [n]Migen.
Verilogcogs
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9
Verilog Modules for DSP functions and other common tasks to make FPGA development easier and more fun.
Numfi
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7
a subclass of numpy.ndarray that does fixed-point arithmetic
Drfm
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5
Code for paper entitled "Low Cost FPGA based Implementation of a DRFM System"
Kapitanov.github.io
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5
CV. Kapitanov Alexander. Deep Learning Engineer, Ex. Lead FPGA developer.
Blackman_harris_win
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5
Blackman-Harris Window functions (3-, 5-, 7-term etc.) from 1K to 64M points based only on LUTs and DSP48s FPGA resources. Main core - CORDIC like as DDS (sine / cosine generator)
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1-36 of 36 search results
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