Netlist Verilog
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Hdlconvertor | 258 |  | 1 | 3 months ago | 19 | July 02, 2021 | 30 | mit | C++ | |
| Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4 | ||||||||||
| Verugent | 46 | 10 months ago | 4 | January 22, 2020 | 1 | apache-2.0 | Rust | |||
| Verilog generation tool written in Rust | ||||||||||
| Hdlconvertorast | 25 |  | 2 | 6 months ago | 11 | October 23, 2023 | 3 | mit | Python | |
| Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator | ||||||||||
| Verilogast Cpp | 20 | 10 months ago | 3 | C++ | ||||||
| C++17 implementation of an AST for Verilog code generation | ||||||||||
| Netlist Verilog | 16 | 13 years ago | 5 | Haskell | ||||||
| Netlist and Verilog Haskell Package | ||||||||||
| Vast | 15 |  | 1 | a year ago | 8 | November 20, 2022 | 2 | apache-2.0 | Rust | |
| Verilog AST | ||||||||||
| Finlog | 9 | 4 years ago | bsd-3-clause | Haskell | ||||||
| Compiling finite generators to digital logic. WIP | ||||||||||
| Goparsebsv | 6 | 7 years ago | mit | Go | ||||||
| A standalone parser for BSV (Bluespec SystemVerilog) written in Go | ||||||||||
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