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Search results for vhdl hls
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vhdl
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20 search results found
Awesome Hdl
⭐
830
Hardware Description Languages
Openwifi Hw
⭐
560
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware
Pipelinec
⭐
519
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
Hwt
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189
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
Zynqbtc
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95
A Bitcoin miner for the Zynq chip utilizing the Zedboard.
Iiot Eddp
⭐
73
The repository contains the design database and documentation for Electric Drives Demonstration Platform
Vivado Kmeans
⭐
42
Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs
Hwtlib
⭐
33
hardware library for hwt (= ipcore repo)
Dss
⭐
25
DASS HLS Compiler
Hwthls
⭐
20
LLVM based HLS library for HWToolkit (hardware devel. toolkit)
Elasticc
⭐
18
lightweight open HLS for FPGA rapid prototyping
Zybo_petalinux_video_hls
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16
Demonstration of a video processing design for the Digilent Zybo, using Web Camera for input and VGA interface for output.
Digital Hardware Modelling
⭐
11
Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
S2nn Hls
⭐
10
Spiking neural network for Zynq devices with Vivado HLS
Hls Axi Master On Microzed With Yocto Linux Device Driver
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8
Creation of a AXI Master and Yocto device driver for Zynq, using High Level Synthesis (HLS) techniques.
Ece5775 Final
⭐
7
Voice Recognition using FPGA-Based Neural Networks
Patmos_hls
⭐
7
Hardware Accelerators (HwAs) constructed in Vivado HLS
Hi Dmm
⭐
6
Hi-DMM: High-Performance Dynamic Memory Management in HLS (High-Level Synthesis)
Cnn_dpr
⭐
5
Landmark Detection with CNN on FPGA including DPR
Hls Zybo
⭐
5
A collection of HLS IP designs for Zybo-Z2
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1-20 of 20 search results
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