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Search results for vhdl dsp
dsp
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vhdl
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13 search results found
Snes_mister
⭐
173
SNES for MiSTer
Rfsoc_qpsk
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62
PYNQ example of using the RFSoC as a QPSK transceiver.
Intfftk
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56
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
Fpga Fft
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42
A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
Fp23fftk
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31
Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
Hwthls
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20
LLVM based HLS library for HWToolkit (hardware devel. toolkit)
Math
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15
Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
Dsp Cores
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11
Repository containing the DSP gateware cores
Em070_new Fpga Family For Cnn Architectures High Speed Soft Neuron Design
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10
Who doesn’t dream of a new FPGA family that can provide embedded hard neurons in its silicon architecture fabric instead of the conventional DSP and multiplier blocks? The optimized hard neuron design will allow all the software and hardware designers to create or test different deep learning network architectures, especially the convolutional neural networks (CNN), more easily and faster in comparing to any previous FPGA family in the market nowadays. The revolutionary idea about this project i
Boostdsp
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9
VHDL Library for implementing common DSP functionality.
Pyha
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9
Describe, simulate and debug hardware in Python
Systolicarray
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6
A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs.
Blackman_harris_win
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5
Blackman-Harris Window functions (3-, 5-, 7-term etc.) from 1K to 64M points based only on LUTs and DSP48s FPGA resources. Main core - CORDIC like as DDS (sine / cosine generator)
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1-13 of 13 search results
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