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12 search results found
Cva6
⭐
2,042
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
Serv
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1,158
SERV - The SErial RISC-V CPU
Riscv Cores List
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791
RISC-V Cores, SoC platforms and SoCs
Riscv
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364
RISC-V CPU Core (RV32IM)
Biriscv
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300
32-bit Superscalar RISC-V CPU
Ara
⭐
276
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
Esp
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267
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
Mempool
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203
A 256-RISC-V-core system with low-latency access into shared L1 memory.
Tekno Kizil
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129
KASIRGA - KIZIL Takımı Teknofest 2023 Çip Tasarımı - KIZIL İşlemci Projesi
Awesome Riscv
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96
😎 A curated list of awesome RISC-V implementations
Cheshire
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80
A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
Awesome Dv
⭐
76
Awesome ASIC design verification
Airisc_core_complex
⭐
48
Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional periperals for embedded AI applications and smart sensors.
Axi Crossbar
⭐
38
An AXI4 crossbar implementation in SystemVerilog
Friscv
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12
RISCV CPU implementation in SystemVerilog
Riscv Asic
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8
RISC-V ASIC design reference
Rp32
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6
RISC-V processor with CPI=1 (every single instruction executed in a single clock cycle).
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