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Search results for clock fpga
clock
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fpga
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54 search results found
Darkriscv
⭐
1,795
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
Silice
⭐
1,199
Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.
Hdmi
⭐
892
Send video/audio over HDMI on an FPGA
Pipelinec
⭐
519
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
Limesdr Usb
⭐
272
USB 3.0 version of the LimeSDR board
Openofdm
⭐
251
Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
Opl3_fpga
⭐
225
Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer
Dblclockfft
⭐
195
A configurable C++ generator of pipelined Verilog FFT cores
Autofpga
⭐
153
A utility for Composing FPGA designs from Peripherals
Usbcorev
⭐
146
A full-speed device-side USB peripheral core written in Verilog.
Dspfilters
⭐
119
A collection of demonstration digital filters
Icestation 32
⭐
107
Compact FPGA game console
Valentyusb
⭐
105
FPGA USB stack written in LiteX
Ecp5 Pcie
⭐
83
Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
Xilinx Serial Miner
⭐
75
Bitcoin miner for Xilinx FPGAs
Core_ddr3_controller
⭐
69
A DDR3 memory controller in Verilog for various FPGAs
Sdram Fpga
⭐
65
A FPGA core for a simple SDRAM controller.
Q27
⭐
53
27-Queens Puzzle: Massively Parellel Enumeration and Solution Counting
Siafpgaminer
⭐
44
VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin
Hyperram
⭐
39
Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
Vhdl Hdmi Out
⭐
33
HDMI Out VHDL code for 7-series Xilinx FPGAs
Vga Clock
⭐
33
Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.
Sdram Controller
⭐
27
Generic FPGA SDRAM controller, originally made for AS4C4M16SA
Icebreaker Candy
⭐
24
Eye candy from an iCEBreaker FPGA and a 64×64 LED panel
Tech_cells_generic
⭐
24
Technology dependent cells instantiated in the design for generic process (simulation, FPGA)
Uhd Fairwaves
⭐
22
Fairwaves version of the UHD drivers, tweaked to support Fairwaves UmTRX.
Fclkcfg
⭐
21
FPGA Clock Configuration Device Driver for Linux
Fpga_cores
⭐
21
Fpga Virtual Graf
⭐
21
Rtcclock
⭐
19
A Real Time Clock core for FPGA's
Icerok
⭐
18
Block probes for Icestudio => Sigrok integration (with Pulseview GUI)
Clash Compucolor2
⭐
18
Clash implementation of the Compucolor II home computer
Avr Glitch 101
⭐
18
the most basic introduction to performing a Vcc glitch attack
Fpga_gameboy_watch
⭐
17
Full gameboy and gameboy color Verilog Implenentation
Async Karin
⭐
17
Async-Karin is an asynchronous framework for FPGA written in Verilog. It has been tested on a Xilinx Artix-7 board and an Altera Cyclone-IV board.
Verifla
⭐
16
Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm
65c02
⭐
15
Implementation of the 65C02 CPU suitable for FPGA.
Second_order_sigma_delta_dac
⭐
15
A comparison of 1st and 2nd order sigma delta DAC for FPGA
Lse Pc
⭐
14
IBM-PC clone based on an Intel 80386SX processor and an Altera Cyclone IV
Nmigen Examples
⭐
10
I want to learn [n]Migen.
Fpga Camera
⭐
10
FPGA digital camera controller and frame capture device in VHDL
Fpga Bicubic Interpolation
⭐
10
use Verilog HDL implemente bicubic interpolation in FPGA
Quickspi
⭐
9
Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
Limenet Micro
⭐
9
LimeNET-Micro PCB Altium project
Ice40_power
⭐
7
Power analysis of the ICE40UP5K-SG48 devices
Core_spiflash
⭐
7
SPI-Flash XIP Interface (Verilog)
Fpgadisplay Ipcore
⭐
7
FPGA VGA Display Handler - IP Core Repository
Limesdr Qpcie
⭐
6
Usrp1_openbts
⭐
6
Altera Quartus Project for OpenBTS USRP1 Cyclone FPGA bitstream
Pin Assignment For De10 Standard
⭐
6
FPGA实验用DE10-Standard开发板引脚表
Sub 25 Ns Nasdaq Itch Fpga Parser
⭐
5
I2s_sender
⭐
5
VHDL I2S transmitter
Core_audio
⭐
5
Audio controller (I2S, SPDIF, DAC)
Fpdpga
⭐
5
FPGA implementations of the PDP-6 and PDP-10
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1-54 of 54 search results
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