Spispy
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Icesugar | 320 | 4 months ago | 6 | Verilog | ||||||
| iCESugar FPGA Board (base on iCE40UP5k) | ||||||||||
| Cores | 302 | 3 years ago | 3 | Verilog | ||||||
| Various HDL (Verilog) IP Cores | ||||||||||
| Spispy | 187 | 4 years ago | 20 | Verilog | ||||||
| An open source SPI flash emulator and monitor | ||||||||||
| Fpga Sdcard Reader | 142 | 7 months ago | 1 | gpl-3.0 | Verilog | |||||
| An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。 | ||||||||||
| Ice40_ultraplus_examples | 115 | 2 years ago | 3 | mpl-2.0 | Verilog | |||||
| Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation | ||||||||||
| Fpga Application Development And Simulation | 96 | 9 months ago | 1 | mit | SystemVerilog | |||||
| 《FPGA应用开发和仿真》（机械工业出版社2018年第1版 ISBN:9787111582786）的源码。Source Code of the book FPGA Application Development and Simulation(CHS). | ||||||||||
| Mriscv | 94 | 6 years ago | other | Verilog | ||||||
| A 32-bit Microcontroller featuring a RISC-V core | ||||||||||
| Sdspi | 91 | 8 months ago | Verilog | |||||||
| SD-Card controller, using a SPI interface that is (optionally) shared | ||||||||||
| Oldland Cpu | 89 | 8 years ago | 1 | Verilog | ||||||
| Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools | ||||||||||
| Fpga Sdcard Reader Spi | 52 | 7 months ago | gpl-3.0 | Verilog | ||||||
| An FPGA-based SD-card reader via SPI bus, which can read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器(通过SPI总线)，可以从FAT16或FAT32格式的SD卡中读取文件。 | ||||||||||
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