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Search results for asic pll
asic
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pll
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2 search results found
Avsdpll_1v8
⭐
65
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
Eda Scripts
⭐
20
Collect of various scripts for helping work with EDA-tools (ASIC, FPGA, etc)
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