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Search results for clock asic
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clock
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3 search results found
Avsdpll_1v8
⭐
65
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
Siafpgaminer
⭐
44
VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin
Vga Clock
⭐
33
Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.
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1-3 of 3 search results
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