Cyc1000_sdram
A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board)
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Riscv Fw Infrastructure | 44 | 3 years ago | apache-2.0 | C | ||||||
| Firmware infrastructure, contain RTOS Abstraction Layer, demos and more... | ||||||||||
| Cyc1000_sdram | 7 | 3 years ago | 1 | Verilog | ||||||
| A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board) | ||||||||||
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