| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Xilinx/finn | 629 |
|
0 | 2 | over 2 years ago | 5 | November 04, 2021 | 66 | bsd-3-clause | Python |
| Dataflow compiler for QNN inference on FPGAs | ||||||||||
| UCLA-VAST/RapidStream | 85 | 0 | 0 | over 3 years ago | 0 | 4 | mit | Python | ||
| [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs. | ||||||||||
| DFiantHDL/DFiant | 56 | 0 | 4 | almost 3 years ago | 3 | September 05, 2023 | 12 | lgpl-3.0 | Scala | |
| DFiant: A Dataflow Hardware Descripition Language | ||||||||||
| Licheng-Guo/RapidStream | 19 | 0 | 0 | over 4 years ago | 0 | 5 | mit | Python | ||
| [FPGA 2022] Parallel placement and routing of Vivado HLS dataflow designs. | ||||||||||
| abs-tudelft/tydi | 11 |
|
0 | 0 | over 3 years ago | 2 | March 16, 2020 | 26 | apache-2.0 | Rust |
| Tydi: an open specification for complex data structures over hardware streams | ||||||||||
| Blaok/soda | 7 |
|
0 | 0 | about 4 years ago | 13 | May 06, 2022 | 8 | mit | Python |
| Stencil with Optimized Dataflow Architecture | ||||||||||
