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Rapidstream

[FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.
Stars
85
License
mit
Open Issues
4
Most Recent Commit
a year ago
Programming Language
Python
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Project NameStarsDownloadsRepos Using ThisPackages Using ThisMost Recent CommitTotal ReleasesLatest ReleaseOpen IssuesLicenseLanguage
Rapidstream85
a year ago4mitPython
[FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.
Rapidstream19
2 years ago5mitPython
[FPGA 2022] Parallel placement and routing of Vivado HLS dataflow designs.
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