| emsec/hal |
490 |
|
0 |
0 |
over 2 years ago |
0 |
|
16 |
mit |
C++ |
| HAL – The Hardware Analyzer |
| hex-five/multizone-sdk |
74 |
|
0 |
0 |
over 2 years ago |
0 |
|
0 |
other |
C |
| MultiZone® Security TEE is the quick and safe way to add security and separation to any RISC-V processors. The RISC-V standard ISA doesn't define TrustZone-like primitives to provide hardware separation. To shield critical functionality from untrusted third-party components, MultiZone provides hardware-enforced, software-defined separation of multi |
| inmcm/Simon_Speck_Ciphers |
61 |
|
0 |
0 |
almost 8 years ago |
1 |
July 21, 2018 |
0 |
mit |
VHDL |
| Implementations of the Simon and Speck Block Ciphers |
| stnolting/fpga_puf |
60 |
|
0 |
0 |
over 3 years ago |
0 |
|
0 |
bsd-3-clause |
VHDL |
| :key: Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA. |
| Fraunhofer-IMS/airisc_core_complex |
48 |
|
0 |
0 |
about 3 years ago |
0 |
|
2 |
other |
Verilog |
| Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional periperals for embedded AI applications and smart sensors. |
| proteus-core/proteus |
27 |
|
0 |
0 |
over 2 years ago |
0 |
|
0 |
mit |
Scala |
| The SpinalHDL design of the Proteus core, an extensible RISC-V core. |
| SySS-Research/icestick-lpc-tpm-sniffer |
18 |
|
0 |
0 |
over 5 years ago |
0 |
|
2 |
gpl-3.0 |
Verilog |
| FGBA-based LPC bus sniffing tool for Lattice iCEstick Evaluation Kit |
| mikeroyal/Virtualization-Emulation-Guide |
8 |
|
0 |
0 |
over 4 years ago |
0 |
|
0 |
|
C++ |
| Virtualization/Emulation Guide |
| GustaMagik/RSA_Security_Token |
5 |
|
0 |
0 |
about 9 years ago |
0 |
|
0 |
bsd-3-clause |
VHDL |
| A Security token system for (two-factor) authentication to Linux / Unix using an FPGA and a PAM-module. Either A: 72-bit or B: 512-bit RSA. Version A is air-gapped. Version B uses USB UART. BSD-3 licensed. |
