Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
---|---|---|---|---|---|---|---|---|---|---|
Hardcaml | 120 | 3 years ago | 14 | isc | OCaml | |||||
[Deprecated see github.com/janestreet/hardcaml] Register Transfer Level Hardware Design in OCaml | ||||||||||
Tree Core Ide | 56 | 2 years ago | gpl-3.0 | JavaScript | ||||||
The next generation integrated development environment for processor design and verification. It has multi-hardware language support, open source IP management and easy-to-use rtl simulation toolset. | ||||||||||
Icarus_verilog | 28 | 2 years ago | 1 | Verilog | ||||||
This repo contains code snippets written in verilog as part of course Computer Architecture of my university curriculum | ||||||||||
Jtag_vpi | 28 | 2 years ago | Verilog | |||||||
TCP/IP controlled VPI JTAG Interface. | ||||||||||
My Verilog Examples | 22 | a year ago | mit | Verilog | ||||||
A place to keep my synthesizable verilog examples. | ||||||||||
Amber_samples | 17 | 12 years ago | Verilog | |||||||
Verilog Osx | 15 | 3 years ago | Verilog | |||||||
Barerbones OSX based Verilog simulation toolchain. | ||||||||||
Ofdm | 14 | 4 years ago | 3 | bsd-3-clause | Scala | |||||
Chisel Things for OFDM | ||||||||||
Waveview | 14 | 3 months ago | 25 | apache-2.0 | Java | |||||
Digital Waveform Viewer | ||||||||||
Fstdumper | 12 | 7 months ago | 4 | gpl-3.0 | C | |||||
Verilog VPI module to dump FST (Fast Signal Trace) databases |