Verilog Pac Man
Verilog implementation of Pac-Man made for a class's final project
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Airisc_core_complex | 48 | a year ago | 2 | other | Verilog | |||||
| Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional periperals for embedded AI applications and smart sensors. | ||||||||||
| Fpganes | 30 | 11 years ago | Verilog | |||||||
| FPGA-based AI for Super Mario Bros. Designed for an Altera DE2 | ||||||||||
| Deepsocflow | 28 | 5 months ago | apache-2.0 | Python | ||||||
| An Open Workflow to Build Custom SoCs and run Deep Models at the Edge | ||||||||||
| Pong | 21 | 12 years ago | Verilog | |||||||
| Pong game on an FPGA in Verilog. | ||||||||||
| Verilog Pac Man | 11 | 12 years ago | Verilog | |||||||
| Verilog implementation of Pac-Man made for a class's final project | ||||||||||
Alternatives To Verilog Pac ManSelect To Compare
Alternative Project Comparisons
Popular Verilog Projects
Popular Artificial Intelligence Projects
Popular Hardware Categories
Get A Weekly Email With Trending Projects For These Categories
No Spam. Unsubscribe easily at any time.
Artificial Intelligence
Verilog
Ghost
Pac