Project Name	Stars	Most Recent Commit	Open Issues	License	Language
Fpga Application Development And Simulation	96	9 months ago	1	mit	SystemVerilog
《FPGA应用开发和仿真》（机械工业出版社2018年第1版 ISBN:9787111582786）的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
Parallella Fpga Dummy Io	35	8 years ago			Tcl
Sample minimal Vivado project for Parallella FPGA
Wbi2c	35	5 months ago			Verilog
Wishbone controlled I2C controllers
Fpga Stereo Camera Basys3	22	a year ago			Verilog
Integration of two camera modules to Basys 3 FPGA
Hps2fpgamapping	21	3 years ago	1	mit	Verilog
SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)
Fpga Virtual Graf	21	5 years ago	1		Verilog

Modules	15	7 months ago	3	gpl-3.0	G-code
MLAB hardware modules and building blocks
Ov7670_nexys4_verilog	14	5 years ago		apache-2.0	Verilog
This code is used to connect the OV7670 Camera to a NEXYS4 and then display the image on a monitor in Verilog
Fpga Camera	10	11 years ago		gpl-3.0	VHDL
FPGA digital camera controller and frame capture device in VHDL
Fpga Depthmap Basys3	8	a year ago	1	mit	VHDL
Real Time depth map generation using SSD algorithm on low end Basys 3 FPGA. Support 320x240 and 160x120 resolutions.

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Fpga Application Development And Simulation ⭐ 96

《FPGA应用开发和仿真》（机械工业出版社2018年第1版 ISBN:9787111582786）的源码。Source Code of the book FPGA Application Development and Simulation(CHS).

most recent commit 9 months ago

Parallella Fpga Dummy Io ⭐ 35

Sample minimal Vivado project for Parallella FPGA

most recent commit 8 years ago

Wbi2c ⭐ 35

Wishbone controlled I2C controllers

most recent commit 5 months ago

Fpga Stereo Camera Basys3 ⭐ 22

Integration of two camera modules to Basys 3 FPGA

most recent commit a year ago

Hps2fpgamapping ⭐ 21

SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)

most recent commit 3 years ago

Fpga Virtual Graf ⭐ 21

most recent commit 5 years ago

Modules ⭐ 15

MLAB hardware modules and building blocks

most recent commit 7 months ago

Ov7670_nexys4_verilog ⭐ 14

This code is used to connect the OV7670 Camera to a NEXYS4 and then display the image on a monitor in Verilog

most recent commit 5 years ago

Fpga Camera ⭐ 10

FPGA digital camera controller and frame capture device in VHDL

most recent commit 11 years ago

Fpga Depthmap Basys3 ⭐ 8

Real Time depth map generation using SSD algorithm on low end Basys 3 FPGA. Support 320x240 and 160x120 resolutions.

most recent commit a year ago

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