F4pga Arch Defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Logisim Evolution | 4,251 | 18 days ago | 209 | gpl-3.0 | Java | |||||
| Digital logic design tool and simulator | ||||||||||
| Openwifi | 3,363 | 4 months ago | 51 | agpl-3.0 | C | |||||
| open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software | ||||||||||
| Vexriscv | 2,135 | 4 months ago | 100 | mit | Assembly | |||||
| A FPGA friendly 32 bit RISC-V CPU implementation | ||||||||||
| Nyuziprocessor | 1,863 | 3 months ago | 90 | apache-2.0 | C | |||||
| GPGPU microprocessor architecture | ||||||||||
| Darkriscv | 1,795 | 5 months ago | 9 | bsd-3-clause | Verilog | |||||
| opensouce RISC-V cpu core implemented in Verilog from scratch in one night! | ||||||||||
| E200_opensource | 1,688 | 3 years ago | 33 | apache-2.0 | Verilog | |||||
| Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2 | ||||||||||
| Icestudio | 1,621 | 3 months ago | 117 | gpl-2.0 | JavaScript | |||||
| :snowflake: Visual editor for open FPGA boards | ||||||||||
| Fromthetransistor | 1,607 | 3 years ago | 16 | |||||||
| From the Transistor to the Web Browser, a rough outline for a 12 week course | ||||||||||
| Spinalhdl | 1,451 | 4 | 3 months ago | 140 | November 01, 2023 | 106 | other | Scala | ||
| Scala based HDL | ||||||||||
| Corundum | 1,354 | 5 months ago | 84 | other | Verilog | |||||
| Open source FPGA-based NIC and platform for in-network compute | ||||||||||
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