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4 search results found

Common_verification ⭐ 23

SystemVerilog modules and classes commonly used for verification

Hwpe Stream ⭐ 15

IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system

Hwpe Mac Engine ⭐ 8

An example Hardware Processing Engine

Stream Ebpc ⭐ 8

Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Lukas Cavigelli, Georg Rutishauser, Luca Benini.

A_formal_tale_chapter_i_amba ⭐ 7

AXI Formal Verification IP

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