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Search results for scala fpga
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38 search results found
Spinalhdl
⭐
1,451
Scala based HDL
Freedom
⭐
940
Source files for SiFive's Freedom platforms
Firesim
⭐
778
FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
Tensil
⭐
218
Open source machine learning accelerators
Dana
⭐
147
Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel
Spinalhdl_cnn_accelerator
⭐
103
CNN accelerator implemented with Spinal HDL
Awesome Riscv
⭐
96
😎 A curated list of awesome RISC-V implementations
Chiselwatt
⭐
95
A tiny POWER Open ISA soft processor written in Chisel
Fastvdma
⭐
92
Antmicro's fast, vendor-neutral DMA IP in Chisel
Chiselv
⭐
88
A RISC-V Core (RV32I) written in Chisel HDL
Fpga Shells
⭐
86
Midas
⭐
81
FPGA-Accelerated Simulation Framework Automatically Transforming Arbitrary RTL
Bismo
⭐
76
BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing
J1sc
⭐
72
A reimplementation of a tiny stack CPU
Dfiant
⭐
56
DFiant: A Dataflow Hardware Descripition Language
Fuxi
⭐
40
Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
Spinalcrypto
⭐
36
SpinalHDL - Cryptography libraries
Proteus
⭐
27
The SpinalHDL design of the Proteus core, an extensible RISC-V core.
Kyogenrv
⭐
25
The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.
Chisel Playground
⭐
24
Chisel HDL example applications
Lighthouse Fpga
⭐
23
Shdl6800
⭐
17
shdl6800: A 6800 processor written in SpinalHDL
Pqriscv Vexriscv
⭐
13
VexRiscv reference platforms for the pqriscv project
Turborav
⭐
12
A self-contained computer stack hobby project
Dirv
⭐
12
This is my first trial project for designing RISC-V in Chisel
Veriscala
⭐
12
Spinaldev
⭐
12
Docker Development Environment for SpinalHDL
Scalabfs
⭐
9
A Scalable BFS Accelerator on FPGA-HBM Platform
Scalabfs
⭐
9
A Scalable BFS Accelerator on FPGA-HBM Platform
Spinalhdl Template
⭐
8
Mill template for beginning your SpinalHDL project
Binary_connect_cifar
⭐
8
An implementation of a BinaryConnect network for cifar10
Midas Examples
⭐
8
Simple MIDAS Examples
Midas Top Release
⭐
7
MIDAS RocketChip Template
Icesugar Chisel
⭐
6
Chisel Examples for the iCESugar FPGA Board
Midas Release
⭐
6
MIDAS Public Release
Learn Rv32i Arty
⭐
6
A Simple As Possible RISCV-32I on Digilent Arty board
Freedom_on_nexys_a7
⭐
6
Shanu
⭐
5
FPGA implementation of the eNodeB and gNB physical layers
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1-38 of 38 search results
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