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Search results for high level synthesis
high-level-synthesis
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41 search results found
Xls
⭐
1,087
XLS: Accelerated HW Synthesis
Pipelinec
⭐
519
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
Dace
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444
DaCe - Data Centric Parallel Programming
Calyx
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443
Intermediate Language (IL) for Hardware Accelerator Generators
Nngen
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281
NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
Veriloggen
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275
Veriloggen: A Mixed-Paradigm Hardware Construction Framework
Hlslib
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236
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
Panda Bambu
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192
PandA-bambu public repository
Lenet5_hls
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188
FPGA Accelerator for CNN using Vivado HLS
Gemm_hls
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184
Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
Poprc
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180
A Compiler for the Popr Language
Dahlia
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114
Time-sensitive affine types for predictable hardware generation
Hls_tutorial_examples
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107
Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
Polyphony
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98
Polyphony is Python based High-Level Synthesis compiler.
Charm
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91
CHARM: Composing Heterogeneous Accelerators on Versal ACAP Architecture
Vericert
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73
A formally verified high-level synthesis tool based on CompCert and written in Coq.
Hcl Dialect
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31
HeteroCL-MLIR dialect for accelerator design
Hlsclt
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30
A Vivado HLS Command Line Helper Tool
Apfp
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19
FPGA acceleration of arbitrary precision floating point computations.
Hls Cnn
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19
High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.
Soap
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18
🎯 soap - Structural Optimisation of Arithmetic Programs
Aim
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18
AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper accepted to ICCAD2023)!
Cho
⭐
15
CHO is a benchmark suite for OpenCL FPGA Accelerators
Metalfs
⭐
14
Near-storage compute aware file system and FPGA operator pipelines.
Blackscholes_montecarlo
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13
Monte Carlo Methods applied to the Black-Scholes financial market model
Financialmodels_amazonf1
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12
Fast Float4hls
⭐
11
Fast Floating Point Operators for High Level Synthesis
Stencilflow
⭐
11
Shiftnet
⭐
10
Fado
⭐
10
[FPGA 2023] FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs
Bream
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9
Bream is a subset/dialect of Scheme that is compiled to run on an alternative platform. More details & initial sources will follow soon.
Dach
⭐
9
DaCH: dataflow cache for high-level synthesis.
Libmem
⭐
9
Anyhls
⭐
8
High-Level Synthesis with Partial Evaluation
Hls_for_cnn
⭐
7
This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera.
Hls_blstm
⭐
7
The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))
Fold
⭐
7
high abstraction synthesis
Fusedgcn4hls
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6
Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis
Hls_fft
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6
Design of High-Level Synthesis of Xilinx FFT IP core via FFT library
Visual System Integrator
⭐
5
Visual System Integrator - Accelerate your embedded development
Drim4hls
⭐
5
DUTH RISC V Microprocessor for High Level Synthesis
Related Searches
Hls High Level Synthesis (28)
Fpga High Level Synthesis (27)
1-41 of 41 search results
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