Mrf Openevr
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Spinalcrypto | 36 | a year ago | 2 | mit | Scala | |||||
| SpinalHDL - Cryptography libraries | ||||||||||
| Aes128 Hdl | 24 | 9 years ago | gpl-2.0 | SystemVerilog | ||||||
| A high-throughput VHDL and SystemVerilog implementation of AES-128 including scripts for a full front-end design process. | ||||||||||
| Aes Vhdl | 23 | 3 years ago | 1 | gpl-3.0 | VHDL | |||||
| VHDL Implementation of AES Algorithm | ||||||||||
| Memsec | 19 | 6 years ago | gpl-3.0 | VHDL | ||||||
| Framework for building transparent memory encryption and authentication solutions | ||||||||||
| Cryptohdl | 13 | 2 years ago | 1 | gpl-3.0 | VHDL | |||||
| A list of VHDL codes implementing cryptographic algorithms | ||||||||||
| Cryptocores | 11 | 3 years ago | gpl-2.0 | VHDL | ||||||
| cryptography ip-cores in vhdl / verilog | ||||||||||
| Aes Over Pcie | 9 | 7 years ago | other | VHDL | ||||||
| A VHDL implementation of 128 bit AES encryption with a PCIe interface. | ||||||||||
| Aeshw | 8 | 10 years ago | bsd-2-clause | VHDL | ||||||
| Aes 128 With An Instruction Set | 6 | 3 years ago | VHDL | |||||||
| Mrf Openevr | 6 | 3 years ago | gpl-3.0 | VHDL | ||||||
| Open source Event Receiver implementation | ||||||||||
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