Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
---|---|---|---|---|---|---|---|---|---|---|
Hal | 490 | 3 months ago | 16 | mit | C++ | |||||
HAL – The Hardware Analyzer | ||||||||||
Degate | 212 | 6 months ago | 4 | gpl-3.0 | C++ | |||||
A modern and open-source cross-platform software for chips reverse engineering. | ||||||||||
Degate | 151 | 4 years ago | 4 | gpl-3.0 | C++ | |||||
Open source software for chip reverse engineering. | ||||||||||
Logic | 121 | 4 years ago | apache-2.0 | SystemVerilog | ||||||
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs. | ||||||||||
Fakepga | 66 | a year ago | gpl-3.0 | CMake | ||||||
Simulating Verilog designs on a microcontroller | ||||||||||
Adms | 54 | 2 years ago | 19 | gpl-3.0 | Perl | |||||
ADMS is a code generator for the Verilog-AMS language | ||||||||||
Autopiper | 40 | 9 years ago | apache-2.0 | C++ | ||||||
Ophidian | 29 | 4 years ago | 16 | apache-2.0 | C++ | |||||
Ophidian's Mirror Repository on github. https://gitlab.com/eclufsc/eda/ophidian | ||||||||||
Virtio | 18 | 6 years ago | 1 | apache-2.0 | SystemVerilog | |||||
Virtio implementation in SystemVerilog | ||||||||||
Mechatronics Firmware | 9 | 3 months ago | 1 | Verilog | ||||||
mechatronics firmware |