Jop
Implementation of the Java VM as soft processor core in an FPGA for embedded real-time systems. (this is my personal branch of JOP for working on better I/O support for the Nexys2 board from Digilent)
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Leflow | 329 | 4 years ago | 1 | other | Verilog | |||||
| Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks | ||||||||||
| Ice40_examples | 94 | a year ago | 7 | gpl-3.0 | Verilog | |||||
| Public examples of ICE40 HX8K examples using Icestorm | ||||||||||
| Subleq | 43 | 3 months ago | 1 | unlicense | Forth | |||||
| 16-bit SUBLEQ CPU running eForth - just for fun | ||||||||||
| Nybbleforth | 38 | 6 years ago | 4 | Forth | ||||||
| Stack machine with 4-bit instructions | ||||||||||
| Virtualization Emulation Guide | 8 | 2 years ago | C++ | |||||||
| Virtualization/Emulation Guide | ||||||||||
| Quartusbuildvms | 8 | 8 years ago | 1 | |||||||
| Details for installing Quartus on Linux (via VMs and Docker containers) to create build machines for Altera FPGA projects | ||||||||||
| Protonvm | 6 | 3 years ago | C++ | |||||||
| Parallel Bytecode Interpreter For Heterogeneous Hardware | ||||||||||
| Oisc | 6 | 13 years ago | Java | |||||||
| A prototype One Instruction Set Computer VM and Assembler | ||||||||||
| Jop | 6 | 13 years ago | Java | |||||||
| Implementation of the Java VM as soft processor core in an FPGA for embedded real-time systems. (this is my personal branch of JOP for working on better I/O support for the Nexys2 board from Digilent) | ||||||||||
| Usbhwthinclient4vm | 5 | 8 years ago | Verilog | |||||||
| Attempt to attach display/mouse/keyboard to VMWAVE virtual machine. HW device for this: Altera MAX10 FPGA dev kit "marsohod3" | ||||||||||
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