Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
---|---|---|---|---|---|---|---|---|---|---|
Zynqnet | 510 | 7 years ago | 38 | gpl-3.0 | HTML | |||||
Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network" | ||||||||||
Scale Sim | 294 | a year ago | mit | Python | ||||||
Lenet5_hls | 188 | 3 years ago | 12 | mit | C++ | |||||
FPGA Accelerator for CNN using Vivado HLS | ||||||||||
Accelerating Cnn With Fpga | 164 | 5 years ago | 1 | other | C++ | |||||
This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU. | ||||||||||
Tf2 | 74 | 4 years ago | 12 | apache-2.0 | Python | |||||
An Open Source Deep Learning Inference Engine Based on FPGA | ||||||||||
Fpga Zynqnet | 56 | 7 years ago | 3 | gpl-3.0 | C++ | |||||
FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS | ||||||||||
Clacc | 51 | 7 years ago | mit | Verilog | ||||||
Deep Learning Accelerator (Convolution Neural Networks) | ||||||||||
Cnn Accelerator Vlsi | 48 | a year ago | 1 | apache-2.0 | Verilog | |||||
Convolutional accelerator kernel, target ASIC & FPGA | ||||||||||
Dnn Accelerator | 45 | a year ago | mit | VHDL | ||||||
A DNN Accelerator implemented with RTL. | ||||||||||
Hls Cnn | 19 | 7 months ago | mit | C | ||||||
High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition. |