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Search results for c plus plus high level synthesis
c-plus-plus
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high-level-synthesis
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15 search results found
Xls
⭐
1,087
XLS: Accelerated HW Synthesis
Hlslib
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236
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
Panda Bambu
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192
PandA-bambu public repository
Lenet5_hls
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188
FPGA Accelerator for CNN using Vivado HLS
Gemm_hls
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184
Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
Hls_tutorial_examples
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107
Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
Charm
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91
CHARM: Composing Heterogeneous Accelerators on Versal ACAP Architecture
Hcl Dialect
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31
HeteroCL-MLIR dialect for accelerator design
Apfp
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19
FPGA acceleration of arbitrary precision floating point computations.
Aim
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18
AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper accepted to ICCAD2023)!
Metalfs
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14
Near-storage compute aware file system and FPGA operator pipelines.
Fast Float4hls
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11
Fast Floating Point Operators for High Level Synthesis
Dach
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9
DaCH: dataflow cache for high-level synthesis.
Fusedgcn4hls
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6
Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis
Drim4hls
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5
DUTH RISC V Microprocessor for High Level Synthesis
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1-15 of 15 search results
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