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6 search results found

Lenet5_hls ⭐ 188

FPGA Accelerator for CNN using Vivado HLS

High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.

CHO is a benchmark suite for OpenCL FPGA Accelerators

Hls_blstm ⭐ 7

The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))

Hls_for_cnn ⭐ 7

This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera.

Visual System Integrator ⭐ 5

Visual System Integrator - Accelerate your embedded development

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1-6 of 6 search results

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