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The Top 20 Fpga Xilinx Systemverilog Open Source Projects

Open source projects categorized as Fpga Xilinx Systemverilog
Categories > Hardware > Fpga
Categories > Systemverilog
Categories > Xilinx
Hdmi ⭐ 892
Send video/audio over HDMI on an FPGA
most recent commit 9 months ago
Edalize ⭐ 573
An abstraction library for interfacing EDA tools
dependent packages 3total releases 24most recent commit 4 months agopypi edalize} Downloads
Nontrivial Mips ⭐ 362
NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
most recent commit 4 years ago
Nitefury And Litefury ⭐ 212
Public repository for Litefury & Nitefury
most recent commit 9 months ago
Fpga Sdcard Reader ⭐ 142
An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。
most recent commit 8 months ago
Logic ⭐ 121
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
most recent commit 4 years ago
Shuhai ⭐ 71
Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA
most recent commit 8 months ago
Fpga Sdcard Reader Spi ⭐ 52
An FPGA-based SD-card reader via SPI bus, which can read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器(通过SPI总线)，可以从FAT16或FAT32格式的SD卡中读取文件。
most recent commit 8 months ago
Bigpulp ⭐ 48
⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform
most recent commit 2 years ago
Zynq Sandbox ⭐ 41
a playground for xilinx zynq fpga experiments
most recent commit 5 years ago
Brianhg Ddr3 Controller ⭐ 34
DDR3 Controller v1.60, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
most recent commit 2 years ago
My Verilog Examples ⭐ 22
A place to keep my synthesizable verilog examples.
most recent commit a year ago
Verilog Fpga ⭐ 19
Many peripherals in Verilog ready to use
most recent commit 4 months ago
Virtio ⭐ 18
Virtio implementation in SystemVerilog
most recent commit 6 years ago
Sha256hasher ⭐ 15
SHA-256 IP core for ZedBoard (Zynq SoC)
most recent commit 6 years ago
Awesome Fpga List ⭐ 12
A collection of some awesome public FPGA projects.
most recent commit a year ago
10g Low Latency Ethernet ⭐ 12
10G Low Latency Ethernet
most recent commit 10 months ago
C16_mister ⭐ 12
Commodore C16 and Plus/4 for MiSTer
most recent commit 5 months ago
Digital Hardware Modelling ⭐ 11
Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
most recent commit 3 years ago
Ultra96 Fractal ⭐ 9
Hardware accelerated Julia set explorer running on Ultra96
most recent commit 2 years ago
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