Sock.sv
A simple TCP socket library for system verilog. Using the system verilog DPI, allows the user to read / write lines from a TCP socket connection.
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Uvm_axi | 83 | 11 years ago | 4 | Verilog | ||||||
| uvm AXI BFM(bus functional model) | ||||||||||
| Shunt | 29 | 4 months ago | other | C | ||||||
| SystemVerilog DPI "TCP/IP Shunt" (System Verilog/SystemC/Python TCP/IP socket library) | ||||||||||
| Sm3_core | 21 | 4 years ago | Verilog | |||||||
| Jtag_dpi | 9 | 12 years ago | C++ | |||||||
| JTAG DPI module for OpenRISC simulation with Verilator | ||||||||||
| Ethernet_dpi | 9 | 11 years ago | Verilog | |||||||
| DPI module for Ethernet-based interaction with Verilator simulations | ||||||||||
| Sock.sv | 8 | 9 years ago | mit | C | ||||||
| A simple TCP socket library for system verilog. Using the system verilog DPI, allows the user to read / write lines from a TCP socket connection. | ||||||||||
| Smtdv | 8 | 8 years ago | 1 | C++ | ||||||
| make your verilog DUT test more smart | ||||||||||
| Uart_dpi | 6 | 12 years ago | 1 | Verilog | ||||||
| DPI module for UART-based console interaction with Verilator simulations | ||||||||||
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C
Tcp
Socket
Verilog
Dpi