Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
---|---|---|---|---|---|---|---|---|---|---|
Darkriscv | 1,795 | 4 months ago | 9 | bsd-3-clause | Verilog | |||||
opensouce RISC-V cpu core implemented in Verilog from scratch in one night! | ||||||||||
Kalibrate Rtl | 379 | 2 years ago | 18 | bsd-2-clause | C++ | |||||
fork of http://thre.at/kalibrate/ for use with rtl-sdr devices | ||||||||||
Autofpga | 153 | 2 months ago | 2 | gpl-3.0 | C++ | |||||
A utility for Composing FPGA designs from Peripherals | ||||||||||
Hyperram | 39 | 6 years ago | Verilog | |||||||
Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC | ||||||||||
Vga Clock | 33 | 2 years ago | 1 | apache-2.0 | Verilog | |||||
Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle. | ||||||||||
Fifo | 18 | 4 years ago | 1 | Verilog | ||||||
Generic FIFO implementation with optional FWFT | ||||||||||
Sha 256 Hdl | 6 | 7 years ago | VHDL | |||||||
An implementation of original SHA-256 hash function in (RTL) VHDL |