Nes Pacs
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Nestang | 245 | 5 months ago | 21 | gpl-3.0 | Verilog | |||||
| NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards | ||||||||||
| Fpga_nes | 173 | 12 years ago | 22 | bsd-2-clause | Verilog | |||||
| FPGA-based Nintendo Entertainment System Emulator | ||||||||||
| Openfpga Nes | 157 | 9 months ago | 5 | gpl-3.0 | SystemVerilog | |||||
| NES for the Analogue Pocket | ||||||||||
| Nes_ecp5 | 29 | 2 years ago | SystemVerilog | |||||||
| NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board | ||||||||||
| Spartan Mini Nes | 18 | 6 years ago | Verilog | |||||||
| An FPGA based handheld NES system built around the Spartan 6 and the Spartan Mini development board. | ||||||||||
| Nesfpga | 18 | 6 years ago | VHDL | |||||||
| A Simple FPGA Implementation of the Nintendo Entertainment System | ||||||||||
| Llama | 15 | 3 years ago | 3 | gpl-3.0 | C | |||||
| Low Latency Open Adapter for MiSTer FPGA | ||||||||||
| Hls_fpga_nes | 14 | 7 years ago | mit | C | ||||||
| An FPGA NES emulator designed by a high level synthesis (HLS) | ||||||||||
| Fpganes_release | 11 | 7 years ago | HTML | |||||||
| Reconstructing NES game console on Altera DE1-SOC FPGA using System Verilog | ||||||||||
| Nes_fpga | 10 | 10 years ago | mit | C | ||||||
| An NES emulator on a Cyclone IV FPGA. | ||||||||||
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