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Search results for rtl verilog hdl
rtl
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verilog-hdl
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4 search results found
Cores
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302
Various HDL (Verilog) IP Cores
Higan Verilog
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33
This is a higan/Verilator co-simulation example/framework
Ethernet Design Verilog
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8
Gigabit Ethernet UDP communication driver
Openxc7 Tetrisaraj
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7
Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our special Video Controller in Basys3 Artix7-35T. Complemented with SW in the bare-metal 'C' they, together, make for this classic game. Except that it's now, in the standard BiH tradition, with a twist of our own.
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1-4 of 4 search results
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