Awesome Open Source

Programming Languages

Search results for rtl hdl

16 search results found

Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework

The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.

A huge VHDL library for FPGA development

Sv Tests ⭐ 257

Test suite designed to check compliance with the SystemVerilog standard.

Bladerf Wiphy ⭐ 255

bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

Hdl Tools ⭐ 61

Facilitates building open source tools for working with hardware description languages (HDLs)

HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded functions, with ZERO learning-curve

Sphinxcontrib Hdl Diagrams ⭐ 43

Sphinx Extension which generates various types of diagrams from Verilog code.

High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.

Virtio implementation in SystemVerilog

Awesome Fpga List ⭐ 12

A collection of some awesome public FPGA projects.

Blockwork ⭐ 9

An opinionated build environment for EDA projects

Describing RTL circuit in Ruby

Sphinx Verilog Domain ⭐ 5

Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.

Gost 28147 89 ⭐ 5

Verilog HDL implementation of the GOST 28147-89 — a Soviet and Russian government standard symmetric key block cipher

Related Searches

Rtl Software Defined Radio (392)

Javascript Rtl (288)

Verilog Rtl (222)

Python Rtl (214)

Radio Rtl (138)

1-16 of 16 search results

Privacy | About | Terms | Follow Us On Twitter

Copyright 2018-2024 Awesome Open Source. All rights reserved.